fetch_impl.hh (7851:bb38f0c47ade) fetch_impl.hh (7857:b2c7e56572a4)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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379}
380
381template<class Impl>
382void
383DefaultFetch<Impl>::processCacheCompletion(PacketPtr pkt)
384{
385 ThreadID tid = pkt->req->threadId();
386
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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379}
380
381template<class Impl>
382void
383DefaultFetch<Impl>::processCacheCompletion(PacketPtr pkt)
384{
385 ThreadID tid = pkt->req->threadId();
386
387 DPRINTF(Fetch, "[tid:%u] Waking up from cache miss.\n",tid);
387 DPRINTF(Fetch, "[tid:%u] Waking up from cache miss.\n", tid);
388
389 assert(!pkt->wasNacked());
390
391 // Only change the status if it's still waiting on the icache access
392 // to return.
393 if (fetchStatus[tid] != IcacheWaitResponse ||
394 pkt->req != memReq[tid] ||
395 isSwitchedOut()) {

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1006 new DynInst(staticInst, thisPC, nextPC, seq, cpu);
1007 instruction->setTid(tid);
1008
1009 instruction->setASID(tid);
1010
1011 instruction->setThreadState(cpu->thread[tid]);
1012
1013 DPRINTF(Fetch, "[tid:%i]: Instruction PC %#x (%d) created "
388
389 assert(!pkt->wasNacked());
390
391 // Only change the status if it's still waiting on the icache access
392 // to return.
393 if (fetchStatus[tid] != IcacheWaitResponse ||
394 pkt->req != memReq[tid] ||
395 isSwitchedOut()) {

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1006 new DynInst(staticInst, thisPC, nextPC, seq, cpu);
1007 instruction->setTid(tid);
1008
1009 instruction->setASID(tid);
1010
1011 instruction->setThreadState(cpu->thread[tid]);
1012
1013 DPRINTF(Fetch, "[tid:%i]: Instruction PC %#x (%d) created "
1014 "[sn:%lli]\n", tid, thisPC.instAddr(),
1014 "[sn:%lli].\n", tid, thisPC.instAddr(),
1015 thisPC.microPC(), seq);
1016
1017 DPRINTF(Fetch, "[tid:%i]: Instruction is: %s\n", tid,
1018 instruction->staticInst->
1019 disassemble(thisPC.instAddr()));
1020
1021#if TRACING_ON
1022 if (trace) {

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1175 // Extract as many instructions and/or microops as we can from
1176 // the memory we've processed so far.
1177 do {
1178 if (!curMacroop) {
1179 if (predecoder.extMachInstReady()) {
1180 ExtMachInst extMachInst;
1181
1182 extMachInst = predecoder.getExtMachInst(thisPC);
1015 thisPC.microPC(), seq);
1016
1017 DPRINTF(Fetch, "[tid:%i]: Instruction is: %s\n", tid,
1018 instruction->staticInst->
1019 disassemble(thisPC.instAddr()));
1020
1021#if TRACING_ON
1022 if (trace) {

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1175 // Extract as many instructions and/or microops as we can from
1176 // the memory we've processed so far.
1177 do {
1178 if (!curMacroop) {
1179 if (predecoder.extMachInstReady()) {
1180 ExtMachInst extMachInst;
1181
1182 extMachInst = predecoder.getExtMachInst(thisPC);
1183 pcOffset = 0;
1184 staticInst = StaticInstPtr(extMachInst,
1185 thisPC.instAddr());
1186
1187 // Increment stat of fetched instructions.
1188 ++fetchedInsts;
1189
1190 if (staticInst->isMacroop())
1183 staticInst = StaticInstPtr(extMachInst,
1184 thisPC.instAddr());
1185
1186 // Increment stat of fetched instructions.
1187 ++fetchedInsts;
1188
1189 if (staticInst->isMacroop())
1190 {
1191 curMacroop = staticInst;
1191 curMacroop = staticInst;
1192 }
1193 else {
1194 pcOffset = 0;
1195 }
1192 } else {
1193 // We need more bytes for this instruction.
1194 break;
1195 }
1196 }
1197 if (curMacroop) {
1198 staticInst = curMacroop->fetchMicroop(thisPC.microPC());
1196 } else {
1197 // We need more bytes for this instruction.
1198 break;
1199 }
1200 }
1201 if (curMacroop) {
1202 staticInst = curMacroop->fetchMicroop(thisPC.microPC());
1199 if (staticInst->isLastMicroop())
1203 if (staticInst->isLastMicroop()) {
1200 curMacroop = NULL;
1204 curMacroop = NULL;
1205 pcOffset = 0;
1206 }
1201 }
1202
1203 DynInstPtr instruction =
1204 buildInst(tid, staticInst, curMacroop,
1205 thisPC, nextPC, true);
1206
1207 numInst++;
1208

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1208
1209 DynInstPtr instruction =
1210 buildInst(tid, staticInst, curMacroop,
1211 thisPC, nextPC, true);
1212
1213 numInst++;
1214

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