fetch_impl.hh (3984:8f1bb70a4abf) | fetch_impl.hh (4022:c422464ca16e) |
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1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 588 unchanged lines hidden (view full) --- 597 memReq[tid]->paddr); 598 ret_fault = TheISA::genMachineCheckFault(); 599 return false; 600 } 601#endif 602 603 // Build packet here. 604 PacketPtr data_pkt = new Packet(mem_req, | 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 588 unchanged lines hidden (view full) --- 597 memReq[tid]->paddr); 598 ret_fault = TheISA::genMachineCheckFault(); 599 return false; 600 } 601#endif 602 603 // Build packet here. 604 PacketPtr data_pkt = new Packet(mem_req, |
605 Packet::ReadReq, Packet::Broadcast); | 605 MemCmd::ReadReq, Packet::Broadcast); |
606 data_pkt->dataDynamicArray(new uint8_t[cacheBlkSize]); 607 608 cacheDataPC[tid] = block_PC; 609 cacheDataValid[tid] = false; 610 611 DPRINTF(Fetch, "Fetch: Doing instruction read.\n"); 612 613 fetchedCacheLines++; --- 826 unchanged lines hidden --- | 606 data_pkt->dataDynamicArray(new uint8_t[cacheBlkSize]); 607 608 cacheDataPC[tid] = block_PC; 609 cacheDataValid[tid] = false; 610 611 DPRINTF(Fetch, "Fetch: Doing instruction read.\n"); 612 613 fetchedCacheLines++; --- 826 unchanged lines hidden --- |