fetch_impl.hh (2757:58e3a66e72f7) | fetch_impl.hh (2790:2f8e9762bee9) |
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1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 343 unchanged lines hidden (view full) --- 352 // Only change the status if it's still waiting on the icache access 353 // to return. 354 if (fetchStatus[tid] != IcacheWaitResponse || 355 pkt->req != memReq[tid] || 356 isSwitchedOut()) { 357 ++fetchIcacheSquashes; 358 delete pkt->req; 359 delete pkt; | 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 343 unchanged lines hidden (view full) --- 352 // Only change the status if it's still waiting on the icache access 353 // to return. 354 if (fetchStatus[tid] != IcacheWaitResponse || 355 pkt->req != memReq[tid] || 356 isSwitchedOut()) { 357 ++fetchIcacheSquashes; 358 delete pkt->req; 359 delete pkt; |
360 memReq[tid] = NULL; | |
361 return; 362 } 363 364 // Wake up the CPU (if it went to sleep and was waiting on this completion 365 // event). 366 cpu->wakeCPU(); 367 368 DPRINTF(Activity, "[tid:%u] Activating fetch due to cache completion\n", --- 917 unchanged lines hidden --- | 360 return; 361 } 362 363 // Wake up the CPU (if it went to sleep and was waiting on this completion 364 // event). 365 cpu->wakeCPU(); 366 367 DPRINTF(Activity, "[tid:%u] Activating fetch due to cache completion\n", --- 917 unchanged lines hidden --- |