fetch_impl.hh (2678:1f86b91dc3bb) | fetch_impl.hh (2679:737e9f158843) |
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1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 16 unchanged lines hidden (view full) --- 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Kevin Lim 29 */ 30 31#include "arch/isa_traits.hh" 32#include "arch/utility.hh" | 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 16 unchanged lines hidden (view full) --- 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Kevin Lim 29 */ 30 31#include "arch/isa_traits.hh" 32#include "arch/utility.hh" |
33#include "cpu/checker/cpu.hh" |
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33#include "cpu/exetrace.hh" 34#include "cpu/o3/fetch.hh" 35#include "mem/packet.hh" 36#include "mem/request.hh" 37#include "sim/byteswap.hh" 38#include "sim/host.hh" 39#include "sim/root.hh" 40 --- 243 unchanged lines hidden (view full) --- 284 285 // Name is finally available, so create the port. 286 icachePort = new IcachePort(this); 287 288 Port *mem_dport = mem->getPort(""); 289 icachePort->setPeer(mem_dport); 290 mem_dport->setPeer(icachePort); 291 | 34#include "cpu/exetrace.hh" 35#include "cpu/o3/fetch.hh" 36#include "mem/packet.hh" 37#include "mem/request.hh" 38#include "sim/byteswap.hh" 39#include "sim/host.hh" 40#include "sim/root.hh" 41 --- 243 unchanged lines hidden (view full) --- 285 286 // Name is finally available, so create the port. 287 icachePort = new IcachePort(this); 288 289 Port *mem_dport = mem->getPort(""); 290 icachePort->setPeer(mem_dport); 291 mem_dport->setPeer(icachePort); 292 |
293 if (cpu->checker) { 294 cpu->checker->setIcachePort(icachePort); 295 } 296 |
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292 // Fetch needs to start fetching instructions at the very beginning, 293 // so it must start up in active state. 294 switchToActive(); 295} 296 297template<class Impl> 298void 299DefaultFetch<Impl>::setTimeBuffer(TimeBuffer<TimeStruct> *time_buffer) --- 948 unchanged lines hidden --- | 297 // Fetch needs to start fetching instructions at the very beginning, 298 // so it must start up in active state. 299 switchToActive(); 300} 301 302template<class Impl> 303void 304DefaultFetch<Impl>::setTimeBuffer(TimeBuffer<TimeStruct> *time_buffer) --- 948 unchanged lines hidden --- |