fetch_impl.hh (12422:9d6162c8c1de) fetch_impl.hh (12427:b0611f1ad833)
1/*
2 * Copyright (c) 2010-2014 ARM Limited
3 * Copyright (c) 2012-2013 AMD
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 1263 unchanged lines hidden (view full) ---

1272 break;
1273
1274 if (blkOffset >= numInsts) {
1275 // We need to process more memory, but we've run out of the
1276 // current block.
1277 break;
1278 }
1279
1/*
2 * Copyright (c) 2010-2014 ARM Limited
3 * Copyright (c) 2012-2013 AMD
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 1263 unchanged lines hidden (view full) ---

1272 break;
1273
1274 if (blkOffset >= numInsts) {
1275 // We need to process more memory, but we've run out of the
1276 // current block.
1277 break;
1278 }
1279
1280 if (ISA_HAS_DELAY_SLOT && pcOffset == 0) {
1281 // Walk past any annulled delay slot instructions.
1282 Addr pcAddr = thisPC.instAddr() & BaseCPU::PCMask;
1283 while (fetchAddr != pcAddr && blkOffset < numInsts) {
1284 blkOffset++;
1285 fetchAddr += instSize;
1286 }
1287 if (blkOffset >= numInsts)
1288 break;
1289 }
1290
1291 MachInst inst = TheISA::gtoh(cacheInsts[blkOffset]);
1292 decoder[tid]->moreBytes(thisPC, fetchAddr, inst);
1293
1294 if (decoder[tid]->needMoreBytes()) {
1295 blkOffset++;
1296 fetchAddr += instSize;
1297 pcOffset += instSize;
1298 }

--- 394 unchanged lines hidden --- 		1280 MachInst inst = TheISA::gtoh(cacheInsts[blkOffset]);
1281 decoder[tid]->moreBytes(thisPC, fetchAddr, inst);
1282
1283 if (decoder[tid]->needMoreBytes()) {
1284 blkOffset++;
1285 fetchAddr += instSize;
1286 pcOffset += instSize;
1287 }

--- 394 unchanged lines hidden ---