fetch_impl.hh (10960:b51a2a09ac7d) fetch_impl.hh (11165:d90aec9435bd)
1/*
2 * Copyright (c) 2010-2014 ARM Limited
3 * Copyright (c) 2012-2013 AMD
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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68#include "debug/O3PipeView.hh"
69#include "mem/packet.hh"
70#include "params/DerivO3CPU.hh"
71#include "sim/byteswap.hh"
72#include "sim/core.hh"
73#include "sim/eventq.hh"
74#include "sim/full_system.hh"
75#include "sim/system.hh"
1/*
2 * Copyright (c) 2010-2014 ARM Limited
3 * Copyright (c) 2012-2013 AMD
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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68#include "debug/O3PipeView.hh"
69#include "mem/packet.hh"
70#include "params/DerivO3CPU.hh"
71#include "sim/byteswap.hh"
72#include "sim/core.hh"
73#include "sim/eventq.hh"
74#include "sim/full_system.hh"
75#include "sim/system.hh"
76#include "cpu/o3/isa_specific.hh"
76
77using namespace std;
78
79template<class Impl>
80DefaultFetch<Impl>::DefaultFetch(O3CPU *_cpu, DerivO3CPUParams *params)
81 : cpu(_cpu),
82 decodeToFetchDelay(params->decodeToFetchDelay),
83 renameToFetchDelay(params->renameToFetchDelay),

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146 fetchBuffer[i] = NULL;
147 fetchBufferPC[i] = 0;
148 fetchBufferValid[i] = false;
149 }
150
151 branchPred = params->branchPred;
152
153 for (ThreadID tid = 0; tid < numThreads; tid++) {
77
78using namespace std;
79
80template<class Impl>
81DefaultFetch<Impl>::DefaultFetch(O3CPU *_cpu, DerivO3CPUParams *params)
82 : cpu(_cpu),
83 decodeToFetchDelay(params->decodeToFetchDelay),
84 renameToFetchDelay(params->renameToFetchDelay),

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147 fetchBuffer[i] = NULL;
148 fetchBufferPC[i] = 0;
149 fetchBufferValid[i] = false;
150 }
151
152 branchPred = params->branchPred;
153
154 for (ThreadID tid = 0; tid < numThreads; tid++) {
154 decoder[tid] = new TheISA::Decoder;
155 decoder[tid] = new TheISA::Decoder(params->isa[tid]);
155 // Create space to buffer the cache line data,
156 // which may not hold the entire cache line.
157 fetchBuffer[tid] = new uint8_t[fetchBufferSize];
158 }
159}
160
161template <class Impl>
162std::string

--- 1518 unchanged lines hidden --- 		156 // Create space to buffer the cache line data,
157 // which may not hold the entire cache line.
158 fetchBuffer[tid] = new uint8_t[fetchBufferSize];
159 }
160}
161
162template <class Impl>
163std::string

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