1/* 2 * Copyright (c) 2010-2012 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 46 unchanged lines hidden (view full) --- 55#include "config/the_isa.hh" 56#include "cpu/base.hh" 57//#include "cpu/checker/cpu.hh" 58#include "cpu/o3/fetch.hh" 59#include "cpu/exetrace.hh" 60#include "debug/Activity.hh" 61#include "debug/Drain.hh" 62#include "debug/Fetch.hh" |
63#include "debug/O3PipeView.hh" |
64#include "mem/packet.hh" 65#include "params/DerivO3CPU.hh" 66#include "sim/byteswap.hh" 67#include "sim/core.hh" 68#include "sim/eventq.hh" 69#include "sim/full_system.hh" 70#include "sim/system.hh" 71 --- 1237 unchanged lines hidden (view full) --- 1309 1310 DynInstPtr instruction = 1311 buildInst(tid, staticInst, curMacroop, 1312 thisPC, nextPC, true); 1313 1314 numInst++; 1315 1316#if TRACING_ON |
1317 if (DTRACE(O3PipeView)) { 1318 instruction->fetchTick = curTick(); 1319 } |
1320#endif 1321 1322 nextPC = thisPC; 1323 1324 // If we're branching after this instruction, quite fetching 1325 // from the same block then. 1326 predictedBranch |= thisPC.branching(); 1327 predictedBranch |= --- 319 unchanged lines hidden --- |