1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 1095 unchanged lines hidden (view full) --- 1104 1105 // Make sure this is a valid index. 1106 assert(offset <= cacheBlkSize - instSize); 1107 1108 // Get the instruction from the array of the cache line. 1109 inst = TheISA::gtoh(*reinterpret_cast<TheISA::MachInst *> 1110 (&cacheData[tid][offset])); 1111 |
1112 ext_inst = TheISA::makeExtMI(inst, cpu->tcBase(tid)); |
1113 1114 // Create a new DynInst from the instruction fetched. 1115 DynInstPtr instruction = new DynInst(ext_inst, fetch_PC, 1116 next_PC, 1117 inst_seq, cpu); 1118 instruction->setTid(tid); 1119 1120 instruction->setASID(tid); --- 324 unchanged lines hidden --- |