344,348d343
< delaySlotInfo[tid].branchSeqNum = -1;
< delaySlotInfo[tid].numInsts = 0;
< delaySlotInfo[tid].targetAddr = 0;
< delaySlotInfo[tid].targetReady = false;
<
442,445c437,438
< delaySlotInfo[i].branchSeqNum = -1;
< delaySlotInfo[i].numInsts = 0;
< delaySlotInfo[i].targetAddr = 0;
< delaySlotInfo[i].targetReady = false;
---
> #else
> nextNPC[i] = nextPC[i] + sizeof(TheISA::MachInst);
504d496
< #if ISA_HAS_DELAY_SLOT
508,511d499
< #else
< next_PC = next_PC + instSize;
< inst->setPredTarg(next_PC, next_PC + sizeof(TheISA::MachInst));
< #endif
517d504
< #if ISA_HAS_DELAY_SLOT
521,522c508,510
< if (predict_taken) {
< DPRINTF(Fetch, "[tid:%i]: Branch predicted to be taken.\n", tid);
---
> /* if (predict_taken) {
> DPRINTF(Fetch, "[tid:%i]: Branch predicted to be taken to %#x.\n",
> tid, pred_PC);
525c513
< }
---
> }*/
526a515
> #if ISA_HAS_DELAY_SLOT
528c517
< if (predict_taken) {
---
> if (predict_taken)
530,537c519,520
< // Update delay slot info
< ++delaySlotInfo[tid].numInsts;
< delaySlotInfo[tid].targetAddr = pred_PC;
< DPRINTF(Fetch, "[tid:%i]: %i delay slot inst(s) to process.\n", tid,
< delaySlotInfo[tid].numInsts);
< } else {
< next_NPC = next_NPC + instSize;
< }
---
> else
> next_NPC += instSize;
539c522,526
< predict_taken = branchPred.predict(inst, next_PC, tid);
---
> if (predict_taken)
> next_PC = pred_PC;
> else
> next_PC += instSize;
> next_NPC = next_PC + instSize;
541,542c528,529
< DPRINTF(Fetch, "[tid:%i]: Branch predicted to go to %#x and then %#x.\n",
< tid, next_PC, next_NPC);
---
> /* DPRINTF(Fetch, "[tid:%i]: Branch predicted to go to %#x and then %#x.\n",
> tid, next_PC, next_NPC);*/
707,714d693
< #if ISA_HAS_DELAY_SLOT
< if (seq_num <= delaySlotInfo[tid].branchSeqNum) {
< delaySlotInfo[tid].numInsts = 0;
< delaySlotInfo[tid].targetAddr = 0;
< delaySlotInfo[tid].targetReady = false;
< }
< #endif
<
797,802d775
< if (seq_num <= delaySlotInfo[tid].branchSeqNum) {
< delaySlotInfo[tid].numInsts = 0;
< delaySlotInfo[tid].targetAddr = 0;
< delaySlotInfo[tid].targetReady = false;
< }
<
979a953,955
> DPRINTF(Fetch, "Squashing from decode with PC = %#x, NPC = %#x\n",
> fromDecode->decodeInfo[tid].nextPC,
> fromDecode->decodeInfo[tid].nextNPC);
1126a1103,1106
> if (predicted_branch) {
> DPRINTF(Fetch, "Branch detected with PC = %#x, NPC = %#x\n",
> fetch_PC, fetch_NPC);
> }
1127a1108
>
1161c1142
< DPRINTF(Fetch, "[tid:%i]: MachInst is %#x\n", tid, ext_inst);
---
> //DPRINTF(Fetch, "[tid:%i]: MachInst is %#x\n", tid, ext_inst);
1171a1153
> predicted_branch |= (next_PC != fetch_NPC);
1219a1202,1204
> PC[tid] = next_PC;
> nextPC[tid] = next_NPC;
> nextNPC[tid] = next_NPC + instSize;
1221,1234d1205
< if (delaySlotInfo[tid].targetReady &&
< delaySlotInfo[tid].numInsts == 0) {
< // Set PC to target
< PC[tid] = next_PC;
< nextPC[tid] = next_NPC;
< nextNPC[tid] = next_NPC + instSize;
<
< delaySlotInfo[tid].targetReady = false;
< } else {
< PC[tid] = next_PC;
< nextPC[tid] = next_NPC;
< nextNPC[tid] = next_NPC + instSize;
< }
<
1237,1239c1208
< DPRINTF(Fetch, "[tid:%i]: Setting PC to %08p.\n",tid, next_PC);
< PC[tid] = next_PC;
< nextPC[tid] = next_PC + instSize;
---
> DPRINTF(Fetch, "[tid:%i]: Setting PC to %08p.\n", tid, next_PC);