322d321
< #if ISA_HAS_DELAY_SLOT
324d322
< #endif
507,510c505,507
< Addr cur_PC = next_PC;
< next_PC = cur_PC + instSize; //next_NPC;
< next_NPC = cur_PC + (2 * instSize);//next_NPC + instSize;
< inst->setPredTarg(next_NPC);
---
> next_PC = next_NPC;
> next_NPC = next_NPC + instSize;
> inst->setPredTarg(next_PC, next_NPC);
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< inst->setPredTarg(next_PC);
---
> inst->setPredTarg(next_PC, next_PC + sizeof(TheISA::MachInst));
514a512
> inst->setPredTaken(false);
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< DPRINTF(Fetch, "[tid:%i]: Branch predicted to be true.\n", tid);
---
> DPRINTF(Fetch, "[tid:%i]: Branch predicted to be taken.\n", tid);
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< DPRINTF(Fetch, "[tid:%i]: Branch predicted to be false.\n", tid);
---
> DPRINTF(Fetch, "[tid:%i]: Branch predicted to be not taken.\n", tid);
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> next_PC = next_NPC;
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< next_PC = next_NPC;
532d529
<
538,548c535
< } else { // !predict_taken
< if (inst->isCondDelaySlot()) {
< next_PC = pred_PC;
< // The delay slot is skipped here if there is on
< // prediction
< } else {
< next_PC = next_NPC;
< // No need to declare a delay slot here since
< // there is no for the pred. target to jump
< }
<
---
> } else {
553a541,544
> DPRINTF(Fetch, "[tid:%i]: Branch predicted to go to %#x and then %#x.\n",
> tid, next_PC, next_NPC);
> inst->setPredTarg(next_PC, next_NPC);
> inst->setPredTaken(predict_taken);
674c665,666
< DefaultFetch<Impl>::doSquash(const Addr &new_PC, unsigned tid)
---
> DefaultFetch<Impl>::doSquash(const Addr &new_PC,
> const Addr &new_NPC, unsigned tid)
676,677c668,669
< DPRINTF(Fetch, "[tid:%i]: Squashing, setting PC to: %#x.\n",
< tid, new_PC);
---
> DPRINTF(Fetch, "[tid:%i]: Squashing, setting PC to: %#x, NPC to: %#x.\n",
> tid, new_PC, new_NPC);
680,681c672,673
< nextPC[tid] = new_PC + instSize;
< nextNPC[tid] = new_PC + (2 * instSize);
---
> nextPC[tid] = new_NPC;
> nextNPC[tid] = new_NPC + instSize;
707c699
< DefaultFetch<Impl>::squashFromDecode(const Addr &new_PC,
---
> DefaultFetch<Impl>::squashFromDecode(const Addr &new_PC, const Addr &new_NPC,
713c705
< doSquash(new_PC, tid);
---
> doSquash(new_PC, new_NPC, tid);
796c788,789
< DefaultFetch<Impl>::squash(const Addr &new_PC, const InstSeqNum &seq_num,
---
> DefaultFetch<Impl>::squash(const Addr &new_PC, const Addr &new_NPC,
> const InstSeqNum &seq_num,
801c794
< doSquash(new_PC, tid);
---
> doSquash(new_PC, new_NPC, tid);
930a924
> fromCommit->commitInfo[tid].nextNPC,
987a982
> fromDecode->decodeInfo[tid].nextNPC,
1043a1039,1040
> Addr &fetch_NPC = nextPC[tid];
>
1100c1097,1098
< Addr next_NPC = next_PC + instSize;
---
> Addr next_NPC = fetch_NPC;
>
1147,1148c1145,1147
< DynInstPtr instruction = new DynInst(ext_inst, fetch_PC,
< next_PC,
---
> DynInstPtr instruction = new DynInst(ext_inst,
> fetch_PC, fetch_NPC,
> next_PC, next_NPC,
1246,1248c1245,1247
< PC[tid] = delaySlotInfo[tid].targetAddr; //next_PC
< nextPC[tid] = next_PC + instSize; //next_NPC
< nextNPC[tid] = next_PC + (2 * instSize);
---
> PC[tid] = next_PC;
> nextPC[tid] = next_NPC;
> nextNPC[tid] = next_NPC + instSize;