65,66c65
< DPRINTF(Fetch, "DefaultFetch doesn't update its state from a "
< "functional call.");
---
> warn("Default fetch doesn't update it's state from a functional call.");
83d81
< DPRINTF(Fetch, "Received timing\n");
564,565c562,570
< if (cacheBlocked || isSwitchedOut() ||
< (interruptPending && (fetch_PC & 0x3))) {
---
> if (cacheBlocked) {
> DPRINTF(Fetch, "[tid:%i] Can't fetch cache line, cache blocked\n",
> tid);
> return false;
> } else if (isSwitchedOut()) {
> DPRINTF(Fetch, "[tid:%i] Can't fetch cache line, switched out\n",
> tid);
> return false;
> } else if (interruptPending && !(fetch_PC & 0x3)) {
569a575,576
> DPRINTF(Fetch, "[tid:%i] Can't fetch cache line, interrupt pending\n",
> tid);
574c581
< fetch_PC = icacheBlockAlignPC(fetch_PC);
---
> Addr block_PC = icacheBlockAlignPC(fetch_PC);
577c584
< if (cacheDataValid[tid] && fetch_PC == cacheDataPC[tid]) {
---
> if (cacheDataValid[tid] && block_PC == cacheDataPC[tid]) {
584c591
< RequestPtr mem_req = new Request(tid, fetch_PC, cacheBlkSize, 0,
---
> RequestPtr mem_req = new Request(tid, block_PC, cacheBlkSize, 0,
614c621
< cacheDataPC[tid] = fetch_PC;
---
> cacheDataPC[tid] = block_PC;
1054a1062
> DPRINTF(Fetch, "[tid:%i]: Fetch is idle!\n", tid);
1056a1065
> DPRINTF(Fetch, "[tid:%i]: Fetch is blocked!\n", tid);
1058a1068
> DPRINTF(Fetch, "[tid:%i]: Fetch is squashing!\n", tid);
1060a1071
> DPRINTF(Fetch, "[tid:%i]: Fetch is waiting cache response!\n", tid);
1163,1164c1174,1175
< DPRINTF(Fetch, "Quiesce instruction encountered, halting fetch!",
< curTick);
---
> // warn("%lli: Quiesce instruction encountered, halting fetch!",
> // curTick);
1278,1280d1288
< #else // !FULL_SYSTEM
< fetchStatus[tid] = TrapPending;
< status_change = true;
1281a1290,1292
> // warn("%lli fault (%d) detected @ PC %08p", curTick, fault, PC[tid]);
> #else // !FULL_SYSTEM
> warn("cycle %lli: fault (%s) detected @ PC %08p", curTick, fault->name(), PC[tid]);
1283,1284d1293
< DPRINTF(Fetch, "[tid:%i]: fault (%s) detected @ PC %08p",
< tid, fault->name(), PC[tid]);