62a63
> #include "cpu/o3/cpu.hh"
67a69
> #include "debug/O3CPU.hh"
98a101
> icachePort(this, _cpu),
695c698
< if (!cpu->getInstPort().sendTimingReq(data_pkt)) {
---
> if (!icachePort.sendTimingReq(data_pkt)) {
1425c1428
< if (cpu->getInstPort().sendTimingReq(retryPkt)) {
---
> if (icachePort.sendTimingReq(retryPkt)) {
1672a1676,1695
> template<class Impl>
> bool
> DefaultFetch<Impl>::IcachePort::recvTimingResp(PacketPtr pkt)
> {
> DPRINTF(O3CPU, "Fetch unit received timing\n");
> // We shouldn't ever get a cacheable block in Modified state
> assert(pkt->req->isUncacheable() ||
> !(pkt->cacheResponding() && !pkt->hasSharers()));
> fetch->processCacheCompletion(pkt);
>
> return true;
> }
>
> template<class Impl>
> void
> DefaultFetch<Impl>::IcachePort::recvReqRetry()
> {
> fetch->recvReqRetry();
> }
>