1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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55#include "config/the_isa.hh"
56#include "cpu/base.hh"
57//#include "cpu/checker/cpu.hh"
58#include "cpu/o3/fetch.hh"
59#include "cpu/exetrace.hh"
60#include "debug/Activity.hh"
61#include "debug/Drain.hh"
62#include "debug/Fetch.hh"
63#include "mem/packet.hh"
64#include "params/DerivO3CPU.hh"
65#include "sim/byteswap.hh"
66#include "sim/core.hh"
67#include "sim/eventq.hh"
68#include "sim/full_system.hh"
69#include "sim/system.hh"
70

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1308
1309 DynInstPtr instruction =
1310 buildInst(tid, staticInst, curMacroop,
1311 thisPC, nextPC, true);
1312
1313 numInst++;
1314
1315#if TRACING_ON
1316 instruction->fetchTick = curTick();
1317#endif
1318
1319 nextPC = thisPC;
1320
1321 // If we're branching after this instruction, quite fetching
1322 // from the same block then.
1323 predictedBranch |= thisPC.branching();
1324 predictedBranch |=

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