fetch.hh (8462:80492ae5148e) fetch.hh (8503:479b186a4652)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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327 */
328 bool
329 checkInterrupt(Addr pc)
330 {
331 return (interruptPending && (THE_ISA != ALPHA_ISA || !(pc & 0x3)));
332 }
333
334 /** Squashes a specific thread and resets the PC. */
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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327 */
328 bool
329 checkInterrupt(Addr pc)
330 {
331 return (interruptPending && (THE_ISA != ALPHA_ISA || !(pc & 0x3)));
332 }
333
334 /** Squashes a specific thread and resets the PC. */
335 inline void doSquash(const TheISA::PCState &newPC, ThreadID tid);
335 inline void doSquash(const TheISA::PCState &newPC,
336 const DynInstPtr squashInst, ThreadID tid);
336
337 /** Squashes a specific thread and resets the PC. Also tells the CPU to
338 * remove any instructions between fetch and decode that should be sqaushed.
339 */
340 void squashFromDecode(const TheISA::PCState &newPC,
337
338 /** Squashes a specific thread and resets the PC. Also tells the CPU to
339 * remove any instructions between fetch and decode that should be sqaushed.
340 */
341 void squashFromDecode(const TheISA::PCState &newPC,
341 const InstSeqNum &seq_num, ThreadID tid);
342 const DynInstPtr squashInst,
343 const InstSeqNum seq_num, ThreadID tid);
342
343 /** Checks if a thread is stalled. */
344 bool checkStall(ThreadID tid) const;
345
346 /** Updates overall fetch stage status; to be called at the end of each
347 * cycle. */
348 FetchStatus updateFetchStatus();
349
350 public:
351 /** Squashes a specific thread and resets the PC. Also tells the CPU to
352 * remove any instructions that are not in the ROB. The source of this
353 * squash should be the commit stage.
354 */
344
345 /** Checks if a thread is stalled. */
346 bool checkStall(ThreadID tid) const;
347
348 /** Updates overall fetch stage status; to be called at the end of each
349 * cycle. */
350 FetchStatus updateFetchStatus();
351
352 public:
353 /** Squashes a specific thread and resets the PC. Also tells the CPU to
354 * remove any instructions that are not in the ROB. The source of this
355 * squash should be the commit stage.
356 */
355 void squash(const TheISA::PCState &newPC, const InstSeqNum &seq_num,
356 DynInstPtr &squashInst, ThreadID tid);
357 void squash(const TheISA::PCState &newPC, const InstSeqNum seq_num,
358 DynInstPtr squashInst, ThreadID tid);
357
358 /** Ticks the fetch stage, processing all inputs signals and fetching
359 * as many instructions as possible.
360 */
361 void tick();
362
363 /** Checks all input signals and updates the status as necessary.
364 * @return: Returns if the status has changed due to input signals.

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360 /** Ticks the fetch stage, processing all inputs signals and fetching
361 * as many instructions as possible.
362 */
363 void tick();
364
365 /** Checks all input signals and updates the status as necessary.
366 * @return: Returns if the status has changed due to input signals.

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