| fetch.hh (3846:a0fe3210ce53) | fetch.hh (3949:b6664282d899) |
|---|---|
| 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 225 unchanged lines hidden (view full) --- 234 * @param ret_fault The fault reference that will be set to the result of 235 * the icache access. 236 * @param tid Thread id. 237 * @return Any fault that occured. 238 */ 239 bool fetchCacheLine(Addr fetch_PC, Fault &ret_fault, unsigned tid); 240 241 /** Squashes a specific thread and resets the PC. */ | 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 225 unchanged lines hidden (view full) --- 234 * @param ret_fault The fault reference that will be set to the result of 235 * the icache access. 236 * @param tid Thread id. 237 * @return Any fault that occured. 238 */ 239 bool fetchCacheLine(Addr fetch_PC, Fault &ret_fault, unsigned tid); 240 241 /** Squashes a specific thread and resets the PC. */ |
| 242 inline void doSquash(const Addr &new_PC, unsigned tid); | 242 inline void doSquash(const Addr &new_PC, const Addr &new_NPC, unsigned tid); |
| 243 244 /** Squashes a specific thread and resets the PC. Also tells the CPU to 245 * remove any instructions between fetch and decode that should be sqaushed. 246 */ | 243 244 /** Squashes a specific thread and resets the PC. Also tells the CPU to 245 * remove any instructions between fetch and decode that should be sqaushed. 246 */ |
| 247 void squashFromDecode(const Addr &new_PC, const InstSeqNum &seq_num, 248 unsigned tid); | 247 void squashFromDecode(const Addr &new_PC, const Addr &new_NPC, 248 const InstSeqNum &seq_num, unsigned tid); |
| 249 250 /** Checks if a thread is stalled. */ 251 bool checkStall(unsigned tid) const; 252 253 /** Updates overall fetch stage status; to be called at the end of each 254 * cycle. */ 255 FetchStatus updateFetchStatus(); 256 257 public: 258 /** Squashes a specific thread and resets the PC. Also tells the CPU to 259 * remove any instructions that are not in the ROB. The source of this 260 * squash should be the commit stage. 261 */ | 249 250 /** Checks if a thread is stalled. */ 251 bool checkStall(unsigned tid) const; 252 253 /** Updates overall fetch stage status; to be called at the end of each 254 * cycle. */ 255 FetchStatus updateFetchStatus(); 256 257 public: 258 /** Squashes a specific thread and resets the PC. Also tells the CPU to 259 * remove any instructions that are not in the ROB. The source of this 260 * squash should be the commit stage. 261 */ |
| 262 void squash(const Addr &new_PC, const InstSeqNum &seq_num, | 262 void squash(const Addr &new_PC, const Addr &new_NPC, 263 const InstSeqNum &seq_num, |
| 263 bool squash_delay_slot, unsigned tid); 264 265 /** Ticks the fetch stage, processing all inputs signals and fetching 266 * as many instructions as possible. 267 */ 268 void tick(); 269 270 /** Checks all input signals and updates the status as necessary. --- 223 unchanged lines hidden --- | 264 bool squash_delay_slot, unsigned tid); 265 266 /** Ticks the fetch stage, processing all inputs signals and fetching 267 * as many instructions as possible. 268 */ 269 void tick(); 270 271 /** Checks all input signals and updates the status as necessary. --- 223 unchanged lines hidden --- |