fetch.hh (2733:e0eac8fc5774) fetch.hh (2756:7bf0d6481df9)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 * Korey Sewell
29 */
30
31#ifndef __CPU_O3_FETCH_HH__
32#define __CPU_O3_FETCH_HH__
33
34#include "arch/utility.hh"
35#include "base/statistics.hh"
36#include "base/timebuf.hh"

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52template <class Impl>
53class DefaultFetch
54{
55 public:
56 /** Typedefs from Impl. */
57 typedef typename Impl::CPUPol CPUPol;
58 typedef typename Impl::DynInst DynInst;
59 typedef typename Impl::DynInstPtr DynInstPtr;
30 */
31
32#ifndef __CPU_O3_FETCH_HH__
33#define __CPU_O3_FETCH_HH__
34
35#include "arch/utility.hh"
36#include "base/statistics.hh"
37#include "base/timebuf.hh"

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53template <class Impl>
54class DefaultFetch
55{
56 public:
57 /** Typedefs from Impl. */
58 typedef typename Impl::CPUPol CPUPol;
59 typedef typename Impl::DynInst DynInst;
60 typedef typename Impl::DynInstPtr DynInstPtr;
60 typedef typename Impl::O3CPU O3CPU;
61 typedef typename Impl::FullCPU FullCPU;
61 typedef typename Impl::Params Params;
62
63 /** Typedefs from the CPU policy. */
64 typedef typename CPUPol::BPredUnit BPredUnit;
65 typedef typename CPUPol::FetchStruct FetchStruct;
66 typedef typename CPUPol::TimeStruct TimeStruct;
67
68 /** Typedefs from ISA. */

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159
160 /** Returns the name of fetch. */
161 std::string name() const;
162
163 /** Registers statistics. */
164 void regStats();
165
166 /** Sets CPU pointer. */
62 typedef typename Impl::Params Params;
63
64 /** Typedefs from the CPU policy. */
65 typedef typename CPUPol::BPredUnit BPredUnit;
66 typedef typename CPUPol::FetchStruct FetchStruct;
67 typedef typename CPUPol::TimeStruct TimeStruct;
68
69 /** Typedefs from ISA. */

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160
161 /** Returns the name of fetch. */
162 std::string name() const;
163
164 /** Registers statistics. */
165 void regStats();
166
167 /** Sets CPU pointer. */
167 void setCPU(O3CPU *cpu_ptr);
168 void setCPU(FullCPU *cpu_ptr);
168
169 /** Sets the main backwards communication time buffer pointer. */
170 void setTimeBuffer(TimeBuffer<TimeStruct> *time_buffer);
171
172 /** Sets pointer to list of active threads. */
173 void setActiveThreads(std::list<unsigned> *at_ptr);
174
175 /** Sets pointer to time buffer used to communicate to the next stage. */

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291
292 /** Returns the appropriate thread to fetch using the LSQ count policy. */
293 int lsqCount();
294
295 /** Returns the appropriate thread to fetch using the branch count policy. */
296 int branchCount();
297
298 private:
169
170 /** Sets the main backwards communication time buffer pointer. */
171 void setTimeBuffer(TimeBuffer<TimeStruct> *time_buffer);
172
173 /** Sets pointer to list of active threads. */
174 void setActiveThreads(std::list<unsigned> *at_ptr);
175
176 /** Sets pointer to time buffer used to communicate to the next stage. */

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292
293 /** Returns the appropriate thread to fetch using the LSQ count policy. */
294 int lsqCount();
295
296 /** Returns the appropriate thread to fetch using the branch count policy. */
297 int branchCount();
298
299 private:
299 /** Pointer to the O3CPU. */
300 O3CPU *cpu;
300 /** Pointer to the FullCPU. */
301 FullCPU *cpu;
301
302 /** Time buffer interface. */
303 TimeBuffer<TimeStruct> *timeBuffer;
304
305 /** Wire to get decode's information from backwards time buffer. */
306 typename TimeBuffer<TimeStruct>::wire fromDecode;
307
308 /** Wire to get rename's information from backwards time buffer. */

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330 BPredUnit branchPred;
331
332 /** Per-thread fetch PC. */
333 Addr PC[Impl::MaxThreads];
334
335 /** Per-thread next PC. */
336 Addr nextPC[Impl::MaxThreads];
337
302
303 /** Time buffer interface. */
304 TimeBuffer<TimeStruct> *timeBuffer;
305
306 /** Wire to get decode's information from backwards time buffer. */
307 typename TimeBuffer<TimeStruct>::wire fromDecode;
308
309 /** Wire to get rename's information from backwards time buffer. */

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331 BPredUnit branchPred;
332
333 /** Per-thread fetch PC. */
334 Addr PC[Impl::MaxThreads];
335
336 /** Per-thread next PC. */
337 Addr nextPC[Impl::MaxThreads];
338
339#if THE_ISA != ALPHA_ISA
340 /** Per-thread next Next PC.
341 * This is not a real register but is used for
342 * architectures that use a branch-delay slot.
343 * (such as MIPS or Sparc)
344 */
345 Addr nextNPC[Impl::MaxThreads];
346#endif
347
338 /** Memory request used to access cache. */
339 RequestPtr memReq[Impl::MaxThreads];
340
341 /** Variable that tracks if fetch has written to the time buffer this
342 * cycle. Used to tell CPU if there is activity this cycle.
343 */
344 bool wroteToTimeBuffer;
345

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349 RequestPtr memReq[Impl::MaxThreads];
350
351 /** Variable that tracks if fetch has written to the time buffer this
352 * cycle. Used to tell CPU if there is activity this cycle.
353 */
354 bool wroteToTimeBuffer;
355

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