fetch.hh (2678:1f86b91dc3bb) fetch.hh (2696:30b38e36ff54)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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110 Idle,
111 Squashing,
112 Blocked,
113 Fetching,
114 TrapPending,
115 QuiescePending,
116 SwitchOut,
117 IcacheWaitResponse,
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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110 Idle,
111 Squashing,
112 Blocked,
113 Fetching,
114 TrapPending,
115 QuiescePending,
116 SwitchOut,
117 IcacheWaitResponse,
118 IcacheRetry,
118 IcacheWaitRetry,
119 IcacheAccessComplete
120 };
121
122 /** Fetching Policy, Add new policies here.*/
123 enum FetchPriority {
124 SingleThread,
125 RoundRobin,
126 Branch,

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263 /** Align a PC to the start of an I-cache block. */
264 Addr icacheBlockAlignPC(Addr addr)
265 {
266 addr = TheISA::realPCToFetchPC(addr);
267 return (addr & ~(cacheBlkMask));
268 }
269
270 private:
119 IcacheAccessComplete
120 };
121
122 /** Fetching Policy, Add new policies here.*/
123 enum FetchPriority {
124 SingleThread,
125 RoundRobin,
126 Branch,

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263 /** Align a PC to the start of an I-cache block. */
264 Addr icacheBlockAlignPC(Addr addr)
265 {
266 addr = TheISA::realPCToFetchPC(addr);
267 return (addr & ~(cacheBlkMask));
268 }
269
270 private:
271 void recvRetry();
272
271 /** Returns the appropriate thread to fetch, given the fetch policy. */
272 int getFetchingThread(FetchPriority &fetch_priority);
273
274 /** Returns the appropriate thread to fetch using a round robin policy. */
275 int roundRobin();
276
277 /** Returns the appropriate thread to fetch using the IQ count policy. */
278 int iqCount();

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355 unsigned iewToFetchDelay;
356
357 /** Commit to fetch delay, in ticks. */
358 unsigned commitToFetchDelay;
359
360 /** The width of fetch in instructions. */
361 unsigned fetchWidth;
362
273 /** Returns the appropriate thread to fetch, given the fetch policy. */
274 int getFetchingThread(FetchPriority &fetch_priority);
275
276 /** Returns the appropriate thread to fetch using a round robin policy. */
277 int roundRobin();
278
279 /** Returns the appropriate thread to fetch using the IQ count policy. */
280 int iqCount();

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357 unsigned iewToFetchDelay;
358
359 /** Commit to fetch delay, in ticks. */
360 unsigned commitToFetchDelay;
361
362 /** The width of fetch in instructions. */
363 unsigned fetchWidth;
364
365 /** Is the cache blocked? If so no threads can access it. */
366 bool cacheBlocked;
367
368 /** The packet that is waiting to be retried. */
369 PacketPtr retryPkt;
370
371 /** The thread that is waiting on the cache to tell fetch to retry. */
372 int retryTid;
373
363 /** Cache block size. */
364 int cacheBlkSize;
365
366 /** Mask to get a cache block's address. */
367 Addr cacheBlkMask;
368
369 /** The cache line being fetched. */
370 uint8_t *cacheData[Impl::MaxThreads];

--- 69 unchanged lines hidden --- 		374 /** Cache block size. */
375 int cacheBlkSize;
376
377 /** Mask to get a cache block's address. */
378 Addr cacheBlkMask;
379
380 /** The cache line being fetched. */
381 uint8_t *cacheData[Impl::MaxThreads];

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