fetch.hh (2674:6d4afef73a20) fetch.hh (2678:1f86b91dc3bb)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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318 BPredUnit branchPred;
319
320 /** Per-thread fetch PC. */
321 Addr PC[Impl::MaxThreads];
322
323 /** Per-thread next PC. */
324 Addr nextPC[Impl::MaxThreads];
325
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 309 unchanged lines hidden (view full) ---

318 BPredUnit branchPred;
319
320 /** Per-thread fetch PC. */
321 Addr PC[Impl::MaxThreads];
322
323 /** Per-thread next PC. */
324 Addr nextPC[Impl::MaxThreads];
325
326 /** Memory packet used to access cache. */
327 PacketPtr memPkt[Impl::MaxThreads];
326 /** Memory request used to access cache. */
327 RequestPtr memReq[Impl::MaxThreads];
328
329 /** Variable that tracks if fetch has written to the time buffer this
330 * cycle. Used to tell CPU if there is activity this cycle.
331 */
332 bool wroteToTimeBuffer;
333
334 /** Tracks how many instructions has been fetched this cycle. */
335 int numInst;

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328
329 /** Variable that tracks if fetch has written to the time buffer this
330 * cycle. Used to tell CPU if there is activity this cycle.
331 */
332 bool wroteToTimeBuffer;
333
334 /** Tracks how many instructions has been fetched this cycle. */
335 int numInst;

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