fetch.hh (10331:ed05298e8566) fetch.hh (10379:c00f6d7e2681)
1/*
2 * Copyright (c) 2010-2012, 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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95 : fetch(_fetch)
96 {}
97
98 void
99 markDelayed()
100 {}
101
102 void
1/*
2 * Copyright (c) 2010-2012, 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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95 : fetch(_fetch)
96 {}
97
98 void
99 markDelayed()
100 {}
101
102 void
103 finish(Fault fault, RequestPtr req, ThreadContext *tc,
103 finish(const Fault &fault, RequestPtr req, ThreadContext *tc,
104 BaseTLB::Mode mode)
105 {
106 assert(mode == BaseTLB::Execute);
107 fetch->finishTranslation(fault, req);
108 delete this;
109 }
110 };
111

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289 * @param vaddr The memory address that is being fetched from.
290 * @param ret_fault The fault reference that will be set to the result of
291 * the icache access.
292 * @param tid Thread id.
293 * @param pc The actual PC of the current instruction.
294 * @return Any fault that occured.
295 */
296 bool fetchCacheLine(Addr vaddr, ThreadID tid, Addr pc);
104 BaseTLB::Mode mode)
105 {
106 assert(mode == BaseTLB::Execute);
107 fetch->finishTranslation(fault, req);
108 delete this;
109 }
110 };
111

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289 * @param vaddr The memory address that is being fetched from.
290 * @param ret_fault The fault reference that will be set to the result of
291 * the icache access.
292 * @param tid Thread id.
293 * @param pc The actual PC of the current instruction.
294 * @return Any fault that occured.
295 */
296 bool fetchCacheLine(Addr vaddr, ThreadID tid, Addr pc);
297 void finishTranslation(Fault fault, RequestPtr mem_req);
297 void finishTranslation(const Fault &fault, RequestPtr mem_req);
298
299
300 /** Check if an interrupt is pending and that we need to handle
301 */
302 bool
303 checkInterrupt(Addr pc)
304 {
305 return (interruptPending && (THE_ISA != ALPHA_ISA || !(pc & 0x3)));

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299
300 /** Check if an interrupt is pending and that we need to handle
301 */
302 bool
303 checkInterrupt(Addr pc)
304 {
305 return (interruptPending && (THE_ISA != ALPHA_ISA || !(pc & 0x3)));

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