dyn_inst_impl.hh (8809:bb10807da889) dyn_inst_impl.hh (8887:20ea02da9c53)
1/*
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Kevin Lim
41 */
42
43#include "base/cp_annotate.hh"
1/*
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 27 unchanged lines hidden (view full) ---

36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Kevin Lim
41 */
42
43#include "base/cp_annotate.hh"
44#include "config/use_checker.hh"
45#include "cpu/o3/dyn_inst.hh"
46#include "sim/full_system.hh"
47
48template <class Impl>
49BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst,
50 StaticInstPtr macroop,
51 TheISA::PCState pc, TheISA::PCState predPC,
52 InstSeqNum seq_num, O3CPU *cpu)

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133{
134 // @todo: Pretty convoluted way to avoid squashing from happening
135 // when using the TC during an instruction's execution
136 // (specifically for instructions that have side-effects that use
137 // the TC). Fix this.
138 bool in_syscall = this->thread->inSyscall;
139 this->thread->inSyscall = true;
140
44#include "cpu/o3/dyn_inst.hh"
45#include "sim/full_system.hh"
46
47template <class Impl>
48BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst,
49 StaticInstPtr macroop,
50 TheISA::PCState pc, TheISA::PCState predPC,
51 InstSeqNum seq_num, O3CPU *cpu)

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132{
133 // @todo: Pretty convoluted way to avoid squashing from happening
134 // when using the TC during an instruction's execution
135 // (specifically for instructions that have side-effects that use
136 // the TC). Fix this.
137 bool in_syscall = this->thread->inSyscall;
138 this->thread->inSyscall = true;
139
141#if USE_CHECKER
142 if (this->isStoreConditional()) {
143 this->reqToVerify->setExtraData(pkt->req->getExtraData());
140 if (this->cpu->checker) {
141 if (this->isStoreConditional()) {
142 this->reqToVerify->setExtraData(pkt->req->getExtraData());
143 }
144 }
144 }
145#endif
145
146 this->fault = this->staticInst->completeAcc(pkt, this, this->traceData);
147
148 this->thread->inSyscall = in_syscall;
149
150 return this->fault;
151}
152
153template <class Impl>

--- 62 unchanged lines hidden --- 		146 this->fault = this->staticInst->completeAcc(pkt, this, this->traceData);
147
148 this->thread->inSyscall = in_syscall;
149
150 return this->fault;
151}
152
153template <class Impl>

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