1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 174 unchanged lines hidden (view full) --- 183bool 184BaseO3DynInst<Impl>::simPalCheck(int palFunc) 185{ 186#if THE_ISA != ALPHA_ISA 187 panic("simPalCheck called, but PAL only exists in Alpha!\n"); 188#endif 189 return this->cpu->simPalCheck(palFunc, this->threadNumber); 190} |
191#endif 192 |
193template <class Impl> 194void 195BaseO3DynInst<Impl>::syscall(int64_t callnum) 196{ |
197#if FULL_SYSTEM 198 panic("Syscall emulation isn't available in FS mode.\n"); 199#else |
200 // HACK: check CPU's nextPC before and after syscall. If it 201 // changes, update this instruction's nextPC because the syscall 202 // must have changed the nextPC. 203 TheISA::PCState curPC = this->cpu->pcState(this->threadNumber); 204 this->cpu->syscall(callnum, this->threadNumber); 205 TheISA::PCState newPC = this->cpu->pcState(this->threadNumber); 206 if (!(curPC == newPC)) { 207 this->pcState(newPC); 208 } |
209#endif |
210} |
211 |