1/*
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 29 unchanged lines hidden (view full) ---

38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Kevin Lim
41 */
42
43#include "base/cp_annotate.hh"
44#include "cpu/o3/dyn_inst.hh"
45#include "sim/full_system.hh"
46
47template <class Impl>
48BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst,
49 StaticInstPtr macroop,
50 TheISA::PCState pc, TheISA::PCState predPC,
51 InstSeqNum seq_num, O3CPU *cpu)
52 : BaseDynInst<Impl>(staticInst, macroop, pc, predPC, seq_num, cpu)
53{
54 initVars();
55}
56
57template <class Impl>
58BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr _staticInst,
59 StaticInstPtr _macroop)
60 : BaseDynInst<Impl>(_staticInst, _macroop)
61{
62 initVars();
63}
64
65template <class Impl>
66void
67BaseO3DynInst<Impl>::initVars()
68{
69 // Make sure to have the renamed register entries set to the same
70 // as the normal register entries. It will allow the IQ to work
71 // without any modifications.
72 for (int i = 0; i < this->staticInst->numDestRegs(); i++) {

--- 4 unchanged lines hidden (view full) ---

77 this->_srcRegIdx[i] = this->staticInst->srcRegIdx(i);
78 }
79
80 this->_readySrcRegIdx.reset();
81
82 _numDestMiscRegs = 0;
83
84#if TRACING_ON
85 fetchTick = 0;
86 decodeTick = 0;
87 renameTick = 0;
88 dispatchTick = 0;
89 issueTick = 0;
90 completeTick = 0;
91#endif
92}
93
94template <class Impl>
95Fault
96BaseO3DynInst<Impl>::execute()
97{
98 // @todo: Pretty convoluted way to avoid squashing from happening

--- 118 unchanged lines hidden ---