1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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183bool
184BaseO3DynInst<Impl>::simPalCheck(int palFunc)
185{
186#if THE_ISA != ALPHA_ISA
187 panic("simPalCheck called, but PAL only exists in Alpha!\n");
188#endif
189 return this->cpu->simPalCheck(palFunc, this->threadNumber);
190}
191#else
192template <class Impl>
193void
194BaseO3DynInst<Impl>::syscall(int64_t callnum)
195{
196 // HACK: check CPU's nextPC before and after syscall. If it
197 // changes, update this instruction's nextPC because the syscall
198 // must have changed the nextPC.
199 TheISA::PCState curPC = this->cpu->pcState(this->threadNumber);
200 this->cpu->syscall(callnum, this->threadNumber);
201 TheISA::PCState newPC = this->cpu->pcState(this->threadNumber);
202 if (!(curPC == newPC)) {
203 this->pcState(newPC);
204 }
205}
206#endif
207