dyn_inst.hh (8229:78bf55f23338) dyn_inst.hh (8471:18e560ba1539)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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118 */
119 int _destMiscRegIdx[MaxInstDestRegs];
120 /** Values to be written to the destination misc. registers. */
121 MiscReg _destMiscRegVal[MaxInstDestRegs];
122 /** Number of destination misc. registers. */
123 int _numDestMiscRegs;
124
125 public:
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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118 */
119 int _destMiscRegIdx[MaxInstDestRegs];
120 /** Values to be written to the destination misc. registers. */
121 MiscReg _destMiscRegVal[MaxInstDestRegs];
122 /** Number of destination misc. registers. */
123 int _numDestMiscRegs;
124
125 public:
126
127#if TRACING_ON
128 /** Tick records used for the pipeline activity viewer. */
129 Tick fetchTick;
130 Tick decodeTick;
131 Tick renameTick;
132 Tick dispatchTick;
133 Tick issueTick;
134 Tick completeTick;
135#endif
136
126 /** Reads a misc. register, including any side-effects the read
127 * might have as defined by the architecture.
128 */
129 MiscReg readMiscReg(int misc_reg)
130 {
131 return this->cpu->readMiscReg(misc_reg, this->threadNumber);
132 }
133

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137 /** Reads a misc. register, including any side-effects the read
138 * might have as defined by the architecture.
139 */
140 MiscReg readMiscReg(int misc_reg)
141 {
142 return this->cpu->readMiscReg(misc_reg, this->threadNumber);
143 }
144

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