dyn_inst.hh (5702:bf84e2fa05f7) dyn_inst.hh (6314:781969fbeca9)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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191 // storage (which is pretty hard to imagine they would have reason
192 // to do).
193
194 uint64_t readIntRegOperand(const StaticInst *si, int idx)
195 {
196 return this->cpu->readIntReg(this->_srcRegIdx[idx]);
197 }
198
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 182 unchanged lines hidden (view full) ---

191 // storage (which is pretty hard to imagine they would have reason
192 // to do).
193
194 uint64_t readIntRegOperand(const StaticInst *si, int idx)
195 {
196 return this->cpu->readIntReg(this->_srcRegIdx[idx]);
197 }
198
199 FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
200 {
201 return this->cpu->readFloatReg(this->_srcRegIdx[idx], width);
202 }
203
204 FloatReg readFloatRegOperand(const StaticInst *si, int idx)
205 {
206 return this->cpu->readFloatReg(this->_srcRegIdx[idx]);
207 }
208
199 FloatReg readFloatRegOperand(const StaticInst *si, int idx)
200 {
201 return this->cpu->readFloatReg(this->_srcRegIdx[idx]);
202 }
203
209 FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
210 int width)
211 {
212 return this->cpu->readFloatRegBits(this->_srcRegIdx[idx], width);
213 }
214
215 FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
216 {
217 return this->cpu->readFloatRegBits(this->_srcRegIdx[idx]);
218 }
219
220 /** @todo: Make results into arrays so they can handle multiple dest
221 * registers.
222 */
223 void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
224 {
225 this->cpu->setIntReg(this->_destRegIdx[idx], val);
226 BaseDynInst<Impl>::setIntRegOperand(si, idx, val);
227 }
228
204 FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
205 {
206 return this->cpu->readFloatRegBits(this->_srcRegIdx[idx]);
207 }
208
209 /** @todo: Make results into arrays so they can handle multiple dest
210 * registers.
211 */
212 void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
213 {
214 this->cpu->setIntReg(this->_destRegIdx[idx], val);
215 BaseDynInst<Impl>::setIntRegOperand(si, idx, val);
216 }
217
229 void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
230 int width)
231 {
232 this->cpu->setFloatReg(this->_destRegIdx[idx], val, width);
233 BaseDynInst<Impl>::setFloatRegOperand(si, idx, val, width);
234 }
235
236 void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
237 {
238 this->cpu->setFloatReg(this->_destRegIdx[idx], val);
239 BaseDynInst<Impl>::setFloatRegOperand(si, idx, val);
240 }
241
242 void setFloatRegOperandBits(const StaticInst *si, int idx,
218 void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
219 {
220 this->cpu->setFloatReg(this->_destRegIdx[idx], val);
221 BaseDynInst<Impl>::setFloatRegOperand(si, idx, val);
222 }
223
224 void setFloatRegOperandBits(const StaticInst *si, int idx,
243 FloatRegBits val, int width)
244 {
245 this->cpu->setFloatRegBits(this->_destRegIdx[idx], val, width);
246 BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
247 }
248
249 void setFloatRegOperandBits(const StaticInst *si, int idx,
250 FloatRegBits val)
251 {
252 this->cpu->setFloatRegBits(this->_destRegIdx[idx], val);
253 BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
254 }
255
256#if THE_ISA == MIPS_ISA
257 uint64_t readRegOtherThread(int misc_reg)

--- 33 unchanged lines hidden --- 		225 FloatRegBits val)
226 {
227 this->cpu->setFloatRegBits(this->_destRegIdx[idx], val);
228 BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
229 }
230
231#if THE_ISA == MIPS_ISA
232 uint64_t readRegOtherThread(int misc_reg)

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