dyn_inst.hh (4149:3da926f8ea75) dyn_inst.hh (5335:69d45f5f21a2)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 35 unchanged lines hidden (view full) ---

44#elif THE_ISA == SPARC_ISA
45 template <class Impl> class SparcDynInst;
46 struct SparcSimpleImpl;
47 typedef SparcDynInst<SparcSimpleImpl> O3DynInst;
48#elif THE_ISA == X86_ISA
49 template <class Impl> class X86DynInst;
50 struct X86SimpleImpl;
51 typedef X86DynInst<X86SimpleImpl> O3DynInst;
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 35 unchanged lines hidden (view full) ---

44#elif THE_ISA == SPARC_ISA
45 template <class Impl> class SparcDynInst;
46 struct SparcSimpleImpl;
47 typedef SparcDynInst<SparcSimpleImpl> O3DynInst;
48#elif THE_ISA == X86_ISA
49 template <class Impl> class X86DynInst;
50 struct X86SimpleImpl;
51 typedef X86DynInst<X86SimpleImpl> O3DynInst;
52#elif THE_ISA == ARM_ISA
53 template <class Impl> class ArmDynInst;
54 struct ArmSimpleImpl;
55 typedef ArmDynInst<ArmSimpleImpl> O3DynInst;
52#else
53 #error "O3DynInst not defined for this ISA"
54#endif
55
56#endif // __CPU_O3_DYN_INST_HH__
56#else
57 #error "O3DynInst not defined for this ISA"
58#endif
59
60#endif // __CPU_O3_DYN_INST_HH__