dyn_inst.hh (2850:0b4a6b4c9b8a) | dyn_inst.hh (2935:d1223a6c9156) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 20 unchanged lines hidden (view full) --- 29 */ 30 31#ifndef __CPU_O3_DYN_INST_HH__ 32#define __CPU_O3_DYN_INST_HH__ 33 34#include "arch/isa_specific.hh" 35 36#if THE_ISA == ALPHA_ISA | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 20 unchanged lines hidden (view full) --- 29 */ 30 31#ifndef __CPU_O3_DYN_INST_HH__ 32#define __CPU_O3_DYN_INST_HH__ 33 34#include "arch/isa_specific.hh" 35 36#if THE_ISA == ALPHA_ISA |
37template <class Impl> 38class AlphaDynInst; 39 40struct AlphaSimpleImpl; 41 42typedef AlphaDynInst<AlphaSimpleImpl> O3DynInst; | 37 template <class Impl> class AlphaDynInst; 38 struct AlphaSimpleImpl; 39 typedef AlphaDynInst<AlphaSimpleImpl> O3DynInst; 40#elif THE_ISA == MIPS_ISA 41 template <class Impl> class MipsDynInst; 42 struct MipsSimpleImpl; 43 typedef MipsDynInst<MipsSimpleImpl> O3DynInst; 44#else 45 #error "O3DynInst not defined for this ISA" |
43#endif 44 45#endif // __CPU_O3_DYN_INST_HH__ | 46#endif 47 48#endif // __CPU_O3_DYN_INST_HH__ |