dyn_inst.hh (2848:f29a4a5c4d66) | dyn_inst.hh (2850:0b4a6b4c9b8a) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 17 unchanged lines hidden (view full) --- 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Korey Sewell 29 */ 30 31#ifndef __CPU_O3_DYN_INST_HH__ 32#define __CPU_O3_DYN_INST_HH__ 33 | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 17 unchanged lines hidden (view full) --- 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Korey Sewell 29 */ 30 31#ifndef __CPU_O3_DYN_INST_HH__ 32#define __CPU_O3_DYN_INST_HH__ 33 |
34#include "arch/isa_specific.hh" |
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34 35#if THE_ISA == ALPHA_ISA 36template <class Impl> 37class AlphaDynInst; 38 39struct AlphaSimpleImpl; 40 41typedef AlphaDynInst<AlphaSimpleImpl> O3DynInst; 42#endif 43 44#endif // __CPU_O3_DYN_INST_HH__ | 35 36#if THE_ISA == ALPHA_ISA 37template <class Impl> 38class AlphaDynInst; 39 40struct AlphaSimpleImpl; 41 42typedef AlphaDynInst<AlphaSimpleImpl> O3DynInst; 43#endif 44 45#endif // __CPU_O3_DYN_INST_HH__ |