dyn_inst.hh (10934:5af8f40d8f2c) dyn_inst.hh (10935:acd48ddd725f)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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69 typedef TheISA::ExtMachInst ExtMachInst;
70 /** Logical register index type. */
71 typedef TheISA::RegIndex RegIndex;
72 /** Integer register index type. */
73 typedef TheISA::IntReg IntReg;
74 typedef TheISA::FloatReg FloatReg;
75 typedef TheISA::FloatRegBits FloatRegBits;
76 typedef TheISA::CCReg CCReg;
1/*
2 * Copyright (c) 2010 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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69 typedef TheISA::ExtMachInst ExtMachInst;
70 /** Logical register index type. */
71 typedef TheISA::RegIndex RegIndex;
72 /** Integer register index type. */
73 typedef TheISA::IntReg IntReg;
74 typedef TheISA::FloatReg FloatReg;
75 typedef TheISA::FloatRegBits FloatRegBits;
76 typedef TheISA::CCReg CCReg;
77 typedef TheISA::VectorReg VectorReg;
78
79 /** Misc register index type. */
80 typedef TheISA::MiscReg MiscReg;
81
82 enum {
83 MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
84 MaxInstDestRegs = TheISA::MaxInstDestRegs //< Max dest regs
85 };

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202 this->cpu->setMiscReg(
203 _destMiscRegIdx[i], _destMiscRegVal[i], this->threadNumber);
204
205 this->thread->noSquashFromTC = no_squash_from_TC;
206 }
207
208 void forwardOldRegs()
209 {
77
78 /** Misc register index type. */
79 typedef TheISA::MiscReg MiscReg;
80
81 enum {
82 MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
83 MaxInstDestRegs = TheISA::MaxInstDestRegs //< Max dest regs
84 };

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201 this->cpu->setMiscReg(
202 _destMiscRegIdx[i], _destMiscRegVal[i], this->threadNumber);
203
204 this->thread->noSquashFromTC = no_squash_from_TC;
205 }
206
207 void forwardOldRegs()
208 {
209
210 for (int idx = 0; idx < this->numDestRegs(); idx++) {
211 PhysRegIndex prev_phys_reg = this->prevDestRegIdx(idx);
212 TheISA::RegIndex original_dest_reg =
213 this->staticInst->destRegIdx(idx);
214 switch (regIdxToClass(original_dest_reg)) {
215 case IntRegClass:
216 this->setIntRegOperand(this->staticInst.get(), idx,
217 this->cpu->readIntReg(prev_phys_reg));
218 break;
219 case FloatRegClass:
220 this->setFloatRegOperandBits(this->staticInst.get(), idx,
221 this->cpu->readFloatRegBits(prev_phys_reg));
222 break;
223 case CCRegClass:
224 this->setCCRegOperand(this->staticInst.get(), idx,
225 this->cpu->readCCReg(prev_phys_reg));
226 break;
210 for (int idx = 0; idx < this->numDestRegs(); idx++) {
211 PhysRegIndex prev_phys_reg = this->prevDestRegIdx(idx);
212 TheISA::RegIndex original_dest_reg =
213 this->staticInst->destRegIdx(idx);
214 switch (regIdxToClass(original_dest_reg)) {
215 case IntRegClass:
216 this->setIntRegOperand(this->staticInst.get(), idx,
217 this->cpu->readIntReg(prev_phys_reg));
218 break;
219 case FloatRegClass:
220 this->setFloatRegOperandBits(this->staticInst.get(), idx,
221 this->cpu->readFloatRegBits(prev_phys_reg));
222 break;
223 case CCRegClass:
224 this->setCCRegOperand(this->staticInst.get(), idx,
225 this->cpu->readCCReg(prev_phys_reg));
226 break;
227 case VectorRegClass:
228 this->setVectorRegOperand(this->staticInst.get(), idx,
229 this->cpu->readVectorReg(prev_phys_reg));
230 break;
231
232 case MiscRegClass:
233 // no need to forward misc reg values
234 break;
235 }
236 }
237 }
238 /** Calls hardware return from error interrupt. */
239 Fault hwrei();

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272 return this->cpu->readFloatRegBits(this->_srcRegIdx[idx]);
273 }
274
275 CCReg readCCRegOperand(const StaticInst *si, int idx)
276 {
277 return this->cpu->readCCReg(this->_srcRegIdx[idx]);
278 }
279
227 case MiscRegClass:
228 // no need to forward misc reg values
229 break;
230 }
231 }
232 }
233 /** Calls hardware return from error interrupt. */
234 Fault hwrei();

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267 return this->cpu->readFloatRegBits(this->_srcRegIdx[idx]);
268 }
269
270 CCReg readCCRegOperand(const StaticInst *si, int idx)
271 {
272 return this->cpu->readCCReg(this->_srcRegIdx[idx]);
273 }
274
280 const VectorReg &readVectorRegOperand(const StaticInst *si, int idx)
281 {
282 return this->cpu->readVectorReg(this->_srcRegIdx[idx]);
283 }
284
285 /** @todo: Make results into arrays so they can handle multiple dest
286 * registers.
287 */
288 void setIntRegOperand(const StaticInst *si, int idx, IntReg val)
289 {
290 this->cpu->setIntReg(this->_destRegIdx[idx], val);
291 BaseDynInst<Impl>::setIntRegOperand(si, idx, val);
292 }

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305 }
306
307 void setCCRegOperand(const StaticInst *si, int idx, CCReg val)
308 {
309 this->cpu->setCCReg(this->_destRegIdx[idx], val);
310 BaseDynInst<Impl>::setCCRegOperand(si, idx, val);
311 }
312
275 /** @todo: Make results into arrays so they can handle multiple dest
276 * registers.
277 */
278 void setIntRegOperand(const StaticInst *si, int idx, IntReg val)
279 {
280 this->cpu->setIntReg(this->_destRegIdx[idx], val);
281 BaseDynInst<Impl>::setIntRegOperand(si, idx, val);
282 }

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295 }
296
297 void setCCRegOperand(const StaticInst *si, int idx, CCReg val)
298 {
299 this->cpu->setCCReg(this->_destRegIdx[idx], val);
300 BaseDynInst<Impl>::setCCRegOperand(si, idx, val);
301 }
302
313 void setVectorRegOperand(const StaticInst *si, int idx,
314 const VectorReg &val)
315 {
316 this->cpu->setVectorReg(this->_destRegIdx[idx], val);
317 BaseDynInst<Impl>::setVectorRegOperand(si, idx, val);
318 }
319
320#if THE_ISA == MIPS_ISA
321 MiscReg readRegOtherThread(int misc_reg, ThreadID tid)
322 {
323 panic("MIPS MT not defined for O3 CPU.\n");
324 return 0;
325 }
326
327 void setRegOtherThread(int misc_reg, MiscReg val, ThreadID tid)

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304 MiscReg readRegOtherThread(int misc_reg, ThreadID tid)
305 {
306 panic("MIPS MT not defined for O3 CPU.\n");
307 return 0;
308 }
309
310 void setRegOtherThread(int misc_reg, MiscReg val, ThreadID tid)

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