dyn_inst.hh (10379:c00f6d7e2681) dyn_inst.hh (10417:710ee116eb68)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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78
79 enum {
80 MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
81 MaxInstDestRegs = TheISA::MaxInstDestRegs //< Max dest regs
82 };
83
84 public:
85 /** BaseDynInst constructor given a binary instruction. */
1/*
2 * Copyright (c) 2010 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 69 unchanged lines hidden (view full) ---

78
79 enum {
80 MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
81 MaxInstDestRegs = TheISA::MaxInstDestRegs //< Max dest regs
82 };
83
84 public:
85 /** BaseDynInst constructor given a binary instruction. */
86 BaseO3DynInst(StaticInstPtr staticInst, StaticInstPtr macroop,
86 BaseO3DynInst(const StaticInstPtr &staticInst, const StaticInstPtr &macroop,
87 TheISA::PCState pc, TheISA::PCState predPC,
88 InstSeqNum seq_num, O3CPU *cpu);
89
90 /** BaseDynInst constructor given a static inst pointer. */
87 TheISA::PCState pc, TheISA::PCState predPC,
88 InstSeqNum seq_num, O3CPU *cpu);
89
90 /** BaseDynInst constructor given a static inst pointer. */
91 BaseO3DynInst(StaticInstPtr _staticInst, StaticInstPtr _macroop);
91 BaseO3DynInst(const StaticInstPtr &_staticInst,
92 const StaticInstPtr &_macroop);
92
93 ~BaseO3DynInst();
94
95 /** Executes the instruction.*/
96 Fault execute();
97
98 /** Initiates the access. Only valid for memory operations. */
99 Fault initiateAcc();

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94 ~BaseO3DynInst();
95
96 /** Executes the instruction.*/
97 Fault execute();
98
99 /** Initiates the access. Only valid for memory operations. */
100 Fault initiateAcc();

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