72a73
> using VecPredRegContainer = TheISA::VecPredRegContainer;
233a235,238
> case VecPredRegClass:
> this->setVecPredRegOperand(this->staticInst.get(), idx,
> this->cpu->readVecPredReg(prev_phys_reg));
> break;
363a369,380
> const VecPredRegContainer&
> readVecPredRegOperand(const StaticInst *si, int idx) const override
> {
> return this->cpu->readVecPredReg(this->_srcRegIdx[idx]);
> }
>
> VecPredRegContainer&
> getWritableVecPredRegOperand(const StaticInst *si, int idx) override
> {
> return this->cpu->getWritableVecPredReg(this->_destRegIdx[idx]);
> }
>
401a419,426
> void
> setVecPredRegOperand(const StaticInst *si, int idx,
> const VecPredRegContainer& val) override
> {
> this->cpu->setVecPredReg(this->_destRegIdx[idx], val);
> BaseDynInst<Impl>::setVecPredRegOperand(si, idx, val);
> }
>