70,72c70
< /** Logical register index type. */
< typedef TheISA::RegIndex RegIndex;
< /** Integer register index type. */
---
> /** Register types. */
78c76
< /** Misc register index type. */
---
> /** Misc register type. */
175,177c173,175
< return this->cpu->readMiscReg(
< si->srcRegIdx(idx) - TheISA::Misc_Reg_Base,
< this->threadNumber);
---
> RegId reg = si->srcRegIdx(idx);
> assert(reg.regClass == MiscRegClass);
> return this->cpu->readMiscReg(reg.regIdx, this->threadNumber);
186,187c184,186
< int misc_reg = si->destRegIdx(idx) - TheISA::Misc_Reg_Base;
< setMiscReg(misc_reg, val);
---
> RegId reg = si->destRegIdx(idx);
> assert(reg.regClass == MiscRegClass);
> setMiscReg(reg.regIdx, val);
212c211
< TheISA::RegIndex original_dest_reg =
---
> RegId original_dest_reg =
214c213
< switch (regIdxToClass(original_dest_reg)) {
---
> switch (original_dest_reg.regClass) {
304c303
< MiscReg readRegOtherThread(int misc_reg, ThreadID tid)
---
> MiscReg readRegOtherThread(RegId misc_reg, ThreadID tid)
310c309
< void setRegOtherThread(int misc_reg, MiscReg val, ThreadID tid)
---
> void setRegOtherThread(RegId misc_reg, MiscReg val, ThreadID tid)