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< * Copyright (c) 2012 ARM Limited
---
> * Copyright (c) 2012, 2014 ARM Limited
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< stalls[tid].iew = false;
< stalls[tid].commit = false;
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> template <class Impl>
> bool
> DefaultDecode<Impl>::isDrained() const
> {
> for (ThreadID tid = 0; tid < numThreads; ++tid) {
> if (!insts[tid].empty() || !skidBuffer[tid].empty())
> return false;
> }
> return true;
> }
>
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< } else if (stalls[tid].iew) {
< DPRINTF(Decode,"[tid:%i]: Stall fom IEW stage detected.\n", tid);
< ret_val = true;
< } else if (stalls[tid].commit) {
< DPRINTF(Decode,"[tid:%i]: Stall fom Commit stage detected.\n", tid);
< ret_val = true;
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< DPRINTF(Decode,"Inserting [sn:%lli] PC: %s into decode skidBuffer %i\n",
< inst->seqNum, inst->pcState(), inst->threadNumber);
<
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>
> DPRINTF(Decode,"Inserting [tid:%d][sn:%lli] PC: %s into decode skidBuffer %i\n",
> inst->threadNumber, inst->seqNum, inst->pcState(), skidBuffer[tid].size());
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<
< if (fromIEW->iewBlock[tid]) {
< stalls[tid].iew = true;
< }
<
< if (fromIEW->iewUnblock[tid]) {
< assert(stalls[tid].iew);
< stalls[tid].iew = false;
< }
<
< if (fromCommit->commitBlock[tid]) {
< stalls[tid].commit = true;
< }
<
< if (fromCommit->commitUnblock[tid]) {
< assert(stalls[tid].commit);
< stalls[tid].commit = false;
< }
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< // Check ROB squash signals from commit.
< if (fromCommit->commitInfo[tid].robSquashing) {
< DPRINTF(Decode, "[tid:%u]: ROB is still squashing.\n", tid);
<
< // Continue to squash.
< decodeStatus[tid] = Squashing;
<
< return true;
< }
<