decode.hh (6221:58a3c04e6344) decode.hh (7813:7338bc628489)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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29 */
30
31#ifndef __CPU_O3_DECODE_HH__
32#define __CPU_O3_DECODE_HH__
33
34#include <queue>
35
36#include "base/statistics.hh"
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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29 */
30
31#ifndef __CPU_O3_DECODE_HH__
32#define __CPU_O3_DECODE_HH__
33
34#include <queue>
35
36#include "base/statistics.hh"
37#include "base/timebuf.hh"
37#include "cpu/timebuf.hh"
38
39class DerivO3CPUParams;
40
41/**
42 * DefaultDecode class handles both single threaded and SMT
43 * decode. Its width is specified by the parameters; each cycles it
44 * tries to decode that many instructions. Because instructions are
45 * actually decoded when the StaticInst is created, this stage does

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39class DerivO3CPUParams;
40
41/**
42 * DefaultDecode class handles both single threaded and SMT
43 * decode. Its width is specified by the parameters; each cycles it
44 * tries to decode that many instructions. Because instructions are
45 * actually decoded when the StaticInst is created, this stage does

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