| cpu.hh (6313:95f69a436c82) | cpu.hh (6314:781969fbeca9) |
|---|---|
| 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 421 unchanged lines hidden (view full) --- 430 */ 431 void setMiscReg(int misc_reg, const TheISA::MiscReg &val, 432 ThreadID tid); 433 434 uint64_t readIntReg(int reg_idx); 435 436 TheISA::FloatReg readFloatReg(int reg_idx); 437 | 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 421 unchanged lines hidden (view full) --- 430 */ 431 void setMiscReg(int misc_reg, const TheISA::MiscReg &val, 432 ThreadID tid); 433 434 uint64_t readIntReg(int reg_idx); 435 436 TheISA::FloatReg readFloatReg(int reg_idx); 437 |
| 438 TheISA::FloatReg readFloatReg(int reg_idx, int width); 439 | |
| 440 TheISA::FloatRegBits readFloatRegBits(int reg_idx); 441 | 438 TheISA::FloatRegBits readFloatRegBits(int reg_idx); 439 |
| 442 TheISA::FloatRegBits readFloatRegBits(int reg_idx, int width); 443 | |
| 444 void setIntReg(int reg_idx, uint64_t val); 445 446 void setFloatReg(int reg_idx, TheISA::FloatReg val); 447 | 440 void setIntReg(int reg_idx, uint64_t val); 441 442 void setFloatReg(int reg_idx, TheISA::FloatReg val); 443 |
| 448 void setFloatReg(int reg_idx, TheISA::FloatReg val, int width); 449 | |
| 450 void setFloatRegBits(int reg_idx, TheISA::FloatRegBits val); 451 | 444 void setFloatRegBits(int reg_idx, TheISA::FloatRegBits val); 445 |
| 452 void setFloatRegBits(int reg_idx, TheISA::FloatRegBits val, int width); 453 | |
| 454 uint64_t readArchIntReg(int reg_idx, ThreadID tid); 455 | 446 uint64_t readArchIntReg(int reg_idx, ThreadID tid); 447 |
| 456 float readArchFloatRegSingle(int reg_idx, ThreadID tid); | 448 float readArchFloatReg(int reg_idx, ThreadID tid); |
| 457 | 449 |
| 458 double readArchFloatRegDouble(int reg_idx, ThreadID tid); 459 | |
| 460 uint64_t readArchFloatRegInt(int reg_idx, ThreadID tid); 461 462 /** Architectural register accessors. Looks up in the commit 463 * rename table to obtain the true physical index of the 464 * architected register first, then accesses that physical 465 * register. 466 */ 467 void setArchIntReg(int reg_idx, uint64_t val, ThreadID tid); 468 | 450 uint64_t readArchFloatRegInt(int reg_idx, ThreadID tid); 451 452 /** Architectural register accessors. Looks up in the commit 453 * rename table to obtain the true physical index of the 454 * architected register first, then accesses that physical 455 * register. 456 */ 457 void setArchIntReg(int reg_idx, uint64_t val, ThreadID tid); 458 |
| 469 void setArchFloatRegSingle(int reg_idx, float val, ThreadID tid); | 459 void setArchFloatReg(int reg_idx, float val, ThreadID tid); |
| 470 | 460 |
| 471 void setArchFloatRegDouble(int reg_idx, double val, ThreadID tid); 472 | |
| 473 void setArchFloatRegInt(int reg_idx, uint64_t val, ThreadID tid); 474 475 /** Reads the commit PC of a specific thread. */ 476 Addr readPC(ThreadID tid); 477 478 /** Sets the commit PC of a specific thread. */ 479 void setPC(Addr new_PC, ThreadID tid); 480 --- 292 unchanged lines hidden --- | 461 void setArchFloatRegInt(int reg_idx, uint64_t val, ThreadID tid); 462 463 /** Reads the commit PC of a specific thread. */ 464 Addr readPC(ThreadID tid); 465 466 /** Sets the commit PC of a specific thread. */ 467 void setPC(Addr new_PC, ThreadID tid); 468 --- 292 unchanged lines hidden --- |