cpu.hh (2680:246e7104f744) cpu.hh (2683:d6b72bb2ed97)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 29 unchanged lines hidden (view full) ---

38#include <vector>
39
40#include "arch/isa_traits.hh"
41#include "base/statistics.hh"
42#include "base/timebuf.hh"
43#include "config/full_system.hh"
44#include "cpu/activity.hh"
45#include "cpu/base.hh"
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 29 unchanged lines hidden (view full) ---

38#include <vector>
39
40#include "arch/isa_traits.hh"
41#include "base/statistics.hh"
42#include "base/timebuf.hh"
43#include "config/full_system.hh"
44#include "cpu/activity.hh"
45#include "cpu/base.hh"
46#include "cpu/cpu_exec_context.hh"
46#include "cpu/simple_thread.hh"
47#include "cpu/o3/comm.hh"
48#include "cpu/o3/cpu_policy.hh"
49#include "cpu/o3/scoreboard.hh"
50#include "cpu/o3/thread_state.hh"
51#include "sim/process.hh"
52
53template <class>
54class Checker;

--- 177 unchanged lines hidden (view full) ---

232 { return regFile.miscRegs[tid].getInstAsid(); }
233
234 /** Get data asid. */
235 int getDataAsid(unsigned tid)
236 { return regFile.miscRegs[tid].getDataAsid(); }
237#else
238 /** Get instruction asid. */
239 int getInstAsid(unsigned tid)
47#include "cpu/o3/comm.hh"
48#include "cpu/o3/cpu_policy.hh"
49#include "cpu/o3/scoreboard.hh"
50#include "cpu/o3/thread_state.hh"
51#include "sim/process.hh"
52
53template <class>
54class Checker;

--- 177 unchanged lines hidden (view full) ---

232 { return regFile.miscRegs[tid].getInstAsid(); }
233
234 /** Get data asid. */
235 int getDataAsid(unsigned tid)
236 { return regFile.miscRegs[tid].getDataAsid(); }
237#else
238 /** Get instruction asid. */
239 int getInstAsid(unsigned tid)
240 { return thread[tid]->asid; }
240 { return thread[tid]->getInstAsid(); }
241
242 /** Get data asid. */
243 int getDataAsid(unsigned tid)
241
242 /** Get data asid. */
243 int getDataAsid(unsigned tid)
244 { return thread[tid]->asid; }
244 { return thread[tid]->getDataAsid(); }
245
246#endif
247
248 /** Register accessors. Index refers to the physical register index. */
249 uint64_t readIntReg(int reg_idx);
250
251 FloatReg readFloatReg(int reg_idx);
252

--- 292 unchanged lines hidden ---
245
246#endif
247
248 /** Register accessors. Index refers to the physical register index. */
249 uint64_t readIntReg(int reg_idx);
250
251 FloatReg readFloatReg(int reg_idx);
252

--- 292 unchanged lines hidden ---