cpu.hh (12406:86bde4a026b5) cpu.hh (12749:223c83ed9979)
1/*
2 * Copyright (c) 2011-2013, 2016 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 730 unchanged lines hidden (view full) ---

739
740 /** Mapping for system thread id to cpu id */
741 std::map<ThreadID, unsigned> threadMap;
742
743 /** Available thread ids in the cpu*/
744 std::vector<ThreadID> tids;
745
746 /** CPU read function, forwards read to LSQ. */
1/*
2 * Copyright (c) 2011-2013, 2016 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 730 unchanged lines hidden (view full) ---

739
740 /** Mapping for system thread id to cpu id */
741 std::map<ThreadID, unsigned> threadMap;
742
743 /** Available thread ids in the cpu*/
744 std::vector<ThreadID> tids;
745
746 /** CPU read function, forwards read to LSQ. */
747 Fault read(RequestPtr &req, RequestPtr &sreqLow, RequestPtr &sreqHigh,
747 Fault read(const RequestPtr &req,
748 RequestPtr &sreqLow, RequestPtr &sreqHigh,
748 int load_idx)
749 {
750 return this->iew.ldstQueue.read(req, sreqLow, sreqHigh, load_idx);
751 }
752
753 /** CPU write function, forwards write to LSQ. */
749 int load_idx)
750 {
751 return this->iew.ldstQueue.read(req, sreqLow, sreqHigh, load_idx);
752 }
753
754 /** CPU write function, forwards write to LSQ. */
754 Fault write(RequestPtr &req, RequestPtr &sreqLow, RequestPtr &sreqHigh,
755 Fault write(const RequestPtr &req,
756 const RequestPtr &sreqLow, const RequestPtr &sreqHigh,
755 uint8_t *data, int store_idx)
756 {
757 return this->iew.ldstQueue.write(req, sreqLow, sreqHigh,
758 data, store_idx);
759 }
760
761 /** Used by the fetch unit to get a hold of the instruction port. */
762 MasterPort &getInstPort() override { return icachePort; }

--- 42 unchanged lines hidden --- 		757 uint8_t *data, int store_idx)
758 {
759 return this->iew.ldstQueue.write(req, sreqLow, sreqHigh,
760 data, store_idx);
761 }
762
763 /** Used by the fetch unit to get a hold of the instruction port. */
764 MasterPort &getInstPort() override { return icachePort; }

--- 42 unchanged lines hidden ---