1/* 2 * Copyright (c) 2011 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 41 unchanged lines hidden (view full) --- 50#include <list> 51#include <queue> 52#include <set> 53#include <vector> 54 55#include "arch/types.hh" 56#include "base/statistics.hh" 57#include "config/the_isa.hh" |
58#include "cpu/o3/comm.hh" 59#include "cpu/o3/cpu_policy.hh" 60#include "cpu/o3/scoreboard.hh" 61#include "cpu/o3/thread_state.hh" 62#include "cpu/activity.hh" 63#include "cpu/base.hh" 64#include "cpu/simple_thread.hh" 65#include "cpu/timebuf.hh" --- 648 unchanged lines hidden (view full) --- 714 tcBase(ThreadID tid) 715 { 716 return thread[tid]->getTC(); 717 } 718 719 /** The global sequence number counter. */ 720 InstSeqNum globalSeqNum;//[Impl::MaxThreads]; 721 |
722 /** Pointer to the checker, which can dynamically verify 723 * instruction results at run time. This can be set to NULL if it 724 * is not being used. 725 */ 726 Checker<Impl> *checker; |
727 728 /** Pointer to the system. */ 729 System *system; 730 731 /** Event to call process() on once draining has completed. */ 732 Event *drainEvent; 733 734 /** Counter of how many stages have completed draining. */ --- 87 unchanged lines hidden --- |