2c2
< * Copyright (c) 2011-2012 ARM Limited
---
> * Copyright (c) 2011-2013 ARM Limited
132c132
< class IcachePort : public CpuPort
---
> class IcachePort : public MasterPort
141c141
< : CpuPort(_cpu->name() + ".icache_port", _cpu), fetch(_fetch)
---
> : MasterPort(_cpu->name() + ".icache_port", _cpu), fetch(_fetch)
158c158
< class DcachePort : public CpuPort
---
> class DcachePort : public MasterPort
168c168
< : CpuPort(_cpu->name() + ".dcache_port", _cpu), lsq(_lsq)
---
> : MasterPort(_cpu->name() + ".dcache_port", _cpu), lsq(_lsq)
178a179,183
> virtual void recvFunctionalSnoop(PacketPtr pkt)
> {
> // @todo: Is there a need for potential invalidation here?
> }
>
810c815
< virtual CpuPort &getInstPort() { return icachePort; }
---
> virtual MasterPort &getInstPort() { return icachePort; }
813c818
< virtual CpuPort &getDataPort() { return dcachePort; }
---
> virtual MasterPort &getDataPort() { return dcachePort; }