1/*
2 * Copyright (c) 2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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50#include <list>
51#include <queue>
52#include <set>
53#include <vector>
54
55#include "arch/types.hh"
56#include "base/statistics.hh"
57#include "config/the_isa.hh"
58#include "config/use_checker.hh"
59#include "cpu/o3/comm.hh"
60#include "cpu/o3/cpu_policy.hh"
61#include "cpu/o3/scoreboard.hh"
62#include "cpu/o3/thread_state.hh"
63#include "cpu/activity.hh"
64#include "cpu/base.hh"
65#include "cpu/simple_thread.hh"
66#include "cpu/timebuf.hh"

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715 tcBase(ThreadID tid)
716 {
717 return thread[tid]->getTC();
718 }
719
720 /** The global sequence number counter. */
721 InstSeqNum globalSeqNum;//[Impl::MaxThreads];
722
723#if USE_CHECKER
724 /** Pointer to the checker, which can dynamically verify
725 * instruction results at run time. This can be set to NULL if it
726 * is not being used.
727 */
728 Checker<Impl> *checker;
729#endif
730
731 /** Pointer to the system. */
732 System *system;
733
734 /** Event to call process() on once draining has completed. */
735 Event *drainEvent;
736
737 /** Counter of how many stages have completed draining. */

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