1/*
2 * Copyright (c) 2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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356 this->itb->demapPage(vaddr, asn);
357 }
358
359 void demapDataPage(Addr vaddr, uint64_t asn)
360 {
361 this->dtb->demapPage(vaddr, asn);
362 }
363
364 /** Ticks CPU, calling tick() on each stage, and checking the overall
365 * activity to see if the CPU should deschedule itself.
366 */
367 void tick();
368
369 /** Initialize the CPU */
370 void init();
371

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773 Fault write(RequestPtr &req, RequestPtr &sreqLow, RequestPtr &sreqHigh,
774 uint8_t *data, int store_idx)
775 {
776 return this->iew.ldstQueue.write(req, sreqLow, sreqHigh,
777 data, store_idx);
778 }
779
780 /** Used by the fetch unit to get a hold of the instruction port. */
781 virtual CpuPort &getInstPort() { return icachePort; }
782
783 /** Get the dcache port (used to find block size for translations). */
784 virtual CpuPort &getDataPort() { return dcachePort; }
785
786 Addr lockAddr;
787
788 /** Temporary fix for the lock flag, works in the UP case. */
789 bool lockFlag;
790
791 /** Stat for total number of times the CPU is descheduled. */
792 Stats::Scalar timesIdled;

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