cpu.cc (9384:877293183bdf) cpu.cc (9424:d631aac65246)
1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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642}
643
644template <class Impl>
645void
646FullO3CPU<Impl>::init()
647{
648 BaseCPU::init();
649
1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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642}
643
644template <class Impl>
645void
646FullO3CPU<Impl>::init()
647{
648 BaseCPU::init();
649
650 if (!params()->defer_registration &&
651 system->getMemoryMode() != Enums::timing) {
652 fatal("The O3 CPU requires the memory system to be in "
653 "'timing' mode.\n");
654 }
655
650 for (ThreadID tid = 0; tid < numThreads; ++tid) {
651 // Set noSquashFromTC so that the CPU doesn't squash when initially
652 // setting up registers.
653 thread[tid]->noSquashFromTC = true;
654 // Initialise the ThreadContext's memory proxies
655 thread[tid]->initMemProxies(thread[tid]->getTC());
656 }
657

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1169 iew.resume();
1170 commit.resume();
1171
1172 setDrainState(Drainable::Running);
1173
1174 if (_status == SwitchedOut)
1175 return;
1176
656 for (ThreadID tid = 0; tid < numThreads; ++tid) {
657 // Set noSquashFromTC so that the CPU doesn't squash when initially
658 // setting up registers.
659 thread[tid]->noSquashFromTC = true;
660 // Initialise the ThreadContext's memory proxies
661 thread[tid]->initMemProxies(thread[tid]->getTC());
662 }
663

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1175 iew.resume();
1176 commit.resume();
1177
1178 setDrainState(Drainable::Running);
1179
1180 if (_status == SwitchedOut)
1181 return;
1182
1177 assert(system->getMemoryMode() == Enums::timing);
1183 if (system->getMemoryMode() != Enums::timing) {
1184 fatal("The O3 CPU requires the memory system to be in "
1185 "'timing' mode.\n");
1186 }
1178
1179 if (!tickEvent.scheduled())
1180 schedule(tickEvent, nextCycle());
1181 _status = Running;
1182}
1183
1184template <class Impl>
1185void

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1188 if (!tickEvent.scheduled())
1189 schedule(tickEvent, nextCycle());
1190 _status = Running;
1191}
1192
1193template <class Impl>
1194void

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