cpu.cc (7720:65d338a8dba4) | cpu.cc (7823:dac01f14f20f) |
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1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 320 unchanged lines hidden (view full) --- 329 // Give renameMap & rename stage access to the freeList; 330 for (ThreadID tid = 0; tid < numThreads; tid++) 331 renameMap[tid].setFreeList(&freeList); 332 rename.setFreeList(&freeList); 333 334 // Setup the ROB for whichever stages need it. 335 commit.setROB(&rob); 336 | 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 320 unchanged lines hidden (view full) --- 329 // Give renameMap & rename stage access to the freeList; 330 for (ThreadID tid = 0; tid < numThreads; tid++) 331 renameMap[tid].setFreeList(&freeList); 332 rename.setFreeList(&freeList); 333 334 // Setup the ROB for whichever stages need it. 335 commit.setROB(&rob); 336 |
337 lastRunningCycle = curTick; | 337 lastRunningCycle = curTick(); |
338 339 lastActivatedCycle = -1; 340#if 0 341 // Give renameMap & rename stage access to the freeList; 342 for (ThreadID tid = 0; tid < numThreads; tid++) 343 globalSeqNum[tid] = 1; 344#endif 345 --- 187 unchanged lines hidden (view full) --- 533 cleanUpRemovedInsts(); 534 } 535 536 if (!tickEvent.scheduled()) { 537 if (_status == SwitchedOut || 538 getState() == SimObject::Drained) { 539 DPRINTF(O3CPU, "Switched out!\n"); 540 // increment stat | 338 339 lastActivatedCycle = -1; 340#if 0 341 // Give renameMap & rename stage access to the freeList; 342 for (ThreadID tid = 0; tid < numThreads; tid++) 343 globalSeqNum[tid] = 1; 344#endif 345 --- 187 unchanged lines hidden (view full) --- 533 cleanUpRemovedInsts(); 534 } 535 536 if (!tickEvent.scheduled()) { 537 if (_status == SwitchedOut || 538 getState() == SimObject::Drained) { 539 DPRINTF(O3CPU, "Switched out!\n"); 540 // increment stat |
541 lastRunningCycle = curTick; | 541 lastRunningCycle = curTick(); |
542 } else if (!activityRec.active() || _status == Idle) { 543 DPRINTF(O3CPU, "Idle!\n"); | 542 } else if (!activityRec.active() || _status == Idle) { 543 DPRINTF(O3CPU, "Idle!\n"); |
544 lastRunningCycle = curTick; | 544 lastRunningCycle = curTick(); |
545 timesIdled++; 546 } else { | 545 timesIdled++; 546 } else { |
547 schedule(tickEvent, nextCycle(curTick + ticks(1))); | 547 schedule(tickEvent, nextCycle(curTick() + ticks(1))); |
548 DPRINTF(O3CPU, "Scheduling next tick!\n"); 549 } 550 } 551 552#if !FULL_SYSTEM 553 updateThreadPriority(); 554#endif 555} --- 78 unchanged lines hidden (view full) --- 634 635template <class Impl> 636void 637FullO3CPU<Impl>::activateContext(ThreadID tid, int delay) 638{ 639 // Needs to set each stage to running as well. 640 if (delay){ 641 DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate " | 548 DPRINTF(O3CPU, "Scheduling next tick!\n"); 549 } 550 } 551 552#if !FULL_SYSTEM 553 updateThreadPriority(); 554#endif 555} --- 78 unchanged lines hidden (view full) --- 634 635template <class Impl> 636void 637FullO3CPU<Impl>::activateContext(ThreadID tid, int delay) 638{ 639 // Needs to set each stage to running as well. 640 if (delay){ 641 DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate " |
642 "on cycle %d\n", tid, curTick + ticks(delay)); | 642 "on cycle %d\n", tid, curTick() + ticks(delay)); |
643 scheduleActivateThreadEvent(tid, delay); 644 } else { 645 activateThread(tid); 646 } 647 | 643 scheduleActivateThreadEvent(tid, delay); 644 } else { 645 activateThread(tid); 646 } 647 |
648 if (lastActivatedCycle < curTick) { | 648 if (lastActivatedCycle < curTick()) { |
649 scheduleTickEvent(delay); 650 651 // Be sure to signal that there's some activity so the CPU doesn't 652 // deschedule itself. 653 activityRec.activity(); 654 fetch.wakeFromQuiesce(); 655 | 649 scheduleTickEvent(delay); 650 651 // Be sure to signal that there's some activity so the CPU doesn't 652 // deschedule itself. 653 activityRec.activity(); 654 fetch.wakeFromQuiesce(); 655 |
656 lastActivatedCycle = curTick; | 656 lastActivatedCycle = curTick(); |
657 658 _status = Running; 659 } 660} 661 662template <class Impl> 663bool 664FullO3CPU<Impl>::deallocateContext(ThreadID tid, bool remove, int delay) 665{ 666 // Schedule removal of thread data from CPU 667 if (delay){ 668 DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to deallocate " | 657 658 _status = Running; 659 } 660} 661 662template <class Impl> 663bool 664FullO3CPU<Impl>::deallocateContext(ThreadID tid, bool remove, int delay) 665{ 666 // Schedule removal of thread data from CPU 667 if (delay){ 668 DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to deallocate " |
669 "on cycle %d\n", tid, curTick + ticks(delay)); | 669 "on cycle %d\n", tid, curTick() + ticks(delay)); |
670 scheduleDeallocateContextEvent(tid, remove, delay); 671 return false; 672 } else { 673 deactivateThread(tid); 674 if (remove) 675 removeThread(tid); 676 return true; 677 } --- 869 unchanged lines hidden (view full) --- 1547{ 1548 if (activityRec.active() || tickEvent.scheduled()) { 1549 DPRINTF(Activity, "CPU already running.\n"); 1550 return; 1551 } 1552 1553 DPRINTF(Activity, "Waking up CPU\n"); 1554 | 670 scheduleDeallocateContextEvent(tid, remove, delay); 671 return false; 672 } else { 673 deactivateThread(tid); 674 if (remove) 675 removeThread(tid); 676 return true; 677 } --- 869 unchanged lines hidden (view full) --- 1547{ 1548 if (activityRec.active() || tickEvent.scheduled()) { 1549 DPRINTF(Activity, "CPU already running.\n"); 1550 return; 1551 } 1552 1553 DPRINTF(Activity, "Waking up CPU\n"); 1554 |
1555 idleCycles += tickToCycles((curTick - 1) - lastRunningCycle); 1556 numCycles += tickToCycles((curTick - 1) - lastRunningCycle); | 1555 idleCycles += tickToCycles((curTick() - 1) - lastRunningCycle); 1556 numCycles += tickToCycles((curTick() - 1) - lastRunningCycle); |
1557 1558 schedule(tickEvent, nextCycle()); 1559} 1560 1561#if FULL_SYSTEM 1562template <class Impl> 1563void 1564FullO3CPU<Impl>::wakeup() --- 63 unchanged lines hidden --- | 1557 1558 schedule(tickEvent, nextCycle()); 1559} 1560 1561#if FULL_SYSTEM 1562template <class Impl> 1563void 1564FullO3CPU<Impl>::wakeup() --- 63 unchanged lines hidden --- |