cpu.cc (5647:b06b49498c79) cpu.cc (5702:bf84e2fa05f7)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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48#else
49#include "sim/process.hh"
50#endif
51
52#if USE_CHECKER
53#include "cpu/checker/cpu.hh"
54#endif
55
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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48#else
49#include "sim/process.hh"
50#endif
51
52#if USE_CHECKER
53#include "cpu/checker/cpu.hh"
54#endif
55
56#if THE_ISA == ALPHA_ISA
57#include "arch/alpha/osfpal.hh"
58#endif
59
56class BaseCPUParams;
57
58using namespace TheISA;
59
60BaseO3CPU::BaseO3CPU(BaseCPUParams *params)
61 : BaseCPU(params), cpu_id(0)
62{
63}

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898 if (this->thread[0]->status() == ThreadContext::Suspended) {
899 DPRINTF(IPI,"Suspended Processor awoke\n");
900 this->threadContexts[0]->activate();
901 }
902}
903
904template <class Impl>
905Fault
60class BaseCPUParams;
61
62using namespace TheISA;
63
64BaseO3CPU::BaseO3CPU(BaseCPUParams *params)
65 : BaseCPU(params), cpu_id(0)
66{
67}

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902 if (this->thread[0]->status() == ThreadContext::Suspended) {
903 DPRINTF(IPI,"Suspended Processor awoke\n");
904 this->threadContexts[0]->activate();
905 }
906}
907
908template <class Impl>
909Fault
910FullO3CPU<Impl>::hwrei(unsigned tid)
911{
912#if THE_ISA == ALPHA_ISA
913 // Need to clear the lock flag upon returning from an interrupt.
914 this->setMiscRegNoEffect(AlphaISA::MISCREG_LOCKFLAG, false, tid);
915
916 this->thread[tid]->kernelStats->hwrei();
917
918 // FIXME: XXX check for interrupts? XXX
919#endif
920 return NoFault;
921}
922
923template <class Impl>
924bool
925FullO3CPU<Impl>::simPalCheck(int palFunc, unsigned tid)
926{
927#if THE_ISA == ALPHA_ISA
928 if (this->thread[tid]->kernelStats)
929 this->thread[tid]->kernelStats->callpal(palFunc,
930 this->threadContexts[tid]);
931
932 switch (palFunc) {
933 case PAL::halt:
934 halt();
935 if (--System::numSystemsRunning == 0)
936 exitSimLoop("all cpus halted");
937 break;
938
939 case PAL::bpt:
940 case PAL::bugchk:
941 if (this->system->breakpoint())
942 return false;
943 break;
944 }
945#endif
946 return true;
947}
948
949template <class Impl>
950Fault
906FullO3CPU<Impl>::getInterrupts()
907{
908 // Check if there are any outstanding interrupts
909 return this->interrupts->getInterrupt(this->threadContexts[0]);
910}
911
912template <class Impl>
913void

--- 785 unchanged lines hidden --- 		951FullO3CPU<Impl>::getInterrupts()
952{
953 // Check if there are any outstanding interrupts
954 return this->interrupts->getInterrupt(this->threadContexts[0]);
955}
956
957template <class Impl>
958void

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