cpu.cc (3675:dc883b610345) cpu.cc (3686:fa8d8b90cd8a)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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492 ThreadContext *src_tc = thread[tid]->getTC();
493#endif
494 // Threads start in the Suspended State
495 if (src_tc->status() != ThreadContext::Suspended) {
496 continue;
497 }
498
499#if FULL_SYSTEM
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 483 unchanged lines hidden (view full) ---

492 ThreadContext *src_tc = thread[tid]->getTC();
493#endif
494 // Threads start in the Suspended State
495 if (src_tc->status() != ThreadContext::Suspended) {
496 continue;
497 }
498
499#if FULL_SYSTEM
500 src_tc->init();
501
502 TheISA::initCPU(src_tc, src_tc->readCpuId());
503#endif
504 }
505
506 // Clear inSyscall.
507 for (int i = 0; i < number_of_threads; ++i)
508 thread[i]->inSyscall = false;
509

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549 activeThreads.erase(thread_it);
550 }
551}
552
553template <class Impl>
554void
555FullO3CPU<Impl>::activateContext(int tid, int delay)
556{
500 TheISA::initCPU(src_tc, src_tc->readCpuId());
501#endif
502 }
503
504 // Clear inSyscall.
505 for (int i = 0; i < number_of_threads; ++i)
506 thread[i]->inSyscall = false;
507

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547 activeThreads.erase(thread_it);
548 }
549}
550
551template <class Impl>
552void
553FullO3CPU<Impl>::activateContext(int tid, int delay)
554{
555#if FULL_SYSTEM
556 // Connect the ThreadContext's memory ports (Functional/Virtual
557 // Ports)
558 threadContexts[tid]->connectMemPorts();
559#endif
560
557 // Needs to set each stage to running as well.
558 if (delay){
559 DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate "
560 "on cycle %d\n", tid, curTick + cycles(delay));
561 scheduleActivateThreadEvent(tid, delay);
562 } else {
563 activateThread(tid);
564 }

--- 891 unchanged lines hidden --- 		561 // Needs to set each stage to running as well.
562 if (delay){
563 DPRINTF(O3CPU, "[tid:%i]: Scheduling thread context to activate "
564 "on cycle %d\n", tid, curTick + cycles(delay));
565 scheduleActivateThreadEvent(tid, delay);
566 } else {
567 activateThread(tid);
568 }

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