cpu.cc (2864:eab7ff8f6d72) cpu.cc (2867:cc92d58a3210)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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395
396 activityRec.advance();
397
398 if (removeInstsThisCycle) {
399 cleanUpRemovedInsts();
400 }
401
402 if (!tickEvent.scheduled()) {
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 386 unchanged lines hidden (view full) ---

395
396 activityRec.advance();
397
398 if (removeInstsThisCycle) {
399 cleanUpRemovedInsts();
400 }
401
402 if (!tickEvent.scheduled()) {
403 if (_status == SwitchedOut) {
403 if (_status == SwitchedOut ||
404 getState() == SimObject::DrainedTiming) {
404 // increment stat
405 lastRunningCycle = curTick;
406 } else if (!activityRec.active()) {
407 lastRunningCycle = curTick;
408 timesIdled++;
409 } else {
410 tickEvent.schedule(curTick + cycles(1));
411 }

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788 commit.resume();
789
790 if (_status == SwitchedOut || _status == Idle)
791 return;
792
793 if (!tickEvent.scheduled())
794 tickEvent.schedule(curTick);
795 _status = Running;
405 // increment stat
406 lastRunningCycle = curTick;
407 } else if (!activityRec.active()) {
408 lastRunningCycle = curTick;
409 timesIdled++;
410 } else {
411 tickEvent.schedule(curTick + cycles(1));
412 }

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789 commit.resume();
790
791 if (_status == SwitchedOut || _status == Idle)
792 return;
793
794 if (!tickEvent.scheduled())
795 tickEvent.schedule(curTick);
796 _status = Running;
797 changeState(SimObject::Timing);
796}
797
798template <class Impl>
799void
800FullO3CPU<Impl>::signalDrained()
801{
802 if (++drainCount == NumStages) {
803 if (tickEvent.scheduled())

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799
800template <class Impl>
801void
802FullO3CPU<Impl>::signalDrained()
803{
804 if (++drainCount == NumStages) {
805 if (tickEvent.scheduled())

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