cpu.cc (2680:246e7104f744) cpu.cc (2683:d6b72bb2ed97)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 24 unchanged lines hidden (view full) ---

33#if FULL_SYSTEM
34#include "sim/system.hh"
35#else
36#include "sim/process.hh"
37#endif
38
39#include "cpu/activity.hh"
40#include "cpu/checker/cpu.hh"
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 24 unchanged lines hidden (view full) ---

33#if FULL_SYSTEM
34#include "sim/system.hh"
35#else
36#include "sim/process.hh"
37#endif
38
39#include "cpu/activity.hh"
40#include "cpu/checker/cpu.hh"
41#include "cpu/cpu_exec_context.hh"
41#include "cpu/simple_thread.hh"
42#include "cpu/thread_context.hh"
43#include "cpu/o3/alpha_dyn_inst.hh"
44#include "cpu/o3/alpha_impl.hh"
45#include "cpu/o3/cpu.hh"
46
47#include "sim/root.hh"
48#include "sim/stat_control.hh"
49

--- 190 unchanged lines hidden (view full) ---

240 commit.setRenameMap(commitRenameMap);
241
242 // Give renameMap & rename stage access to the freeList;
243 for (int i=0; i < numThreads; i++) {
244 renameMap[i].setFreeList(&freeList);
245 }
246 rename.setFreeList(&freeList);
247
42#include "cpu/thread_context.hh"
43#include "cpu/o3/alpha_dyn_inst.hh"
44#include "cpu/o3/alpha_impl.hh"
45#include "cpu/o3/cpu.hh"
46
47#include "sim/root.hh"
48#include "sim/stat_control.hh"
49

--- 190 unchanged lines hidden (view full) ---

240 commit.setRenameMap(commitRenameMap);
241
242 // Give renameMap & rename stage access to the freeList;
243 for (int i=0; i < numThreads; i++) {
244 renameMap[i].setFreeList(&freeList);
245 }
246 rename.setFreeList(&freeList);
247
248 // Setup the page table for whichever stages need it.
249#if !FULL_SYSTEM
250// fetch.setPageTable(pTable);
251// iew.setPageTable(pTable);
252#endif
253
254 // Setup the ROB for whichever stages need it.
255 commit.setROB(&rob);
256
257 lastRunningCycle = curTick;
258
259 contextSwitch = false;
260}
261

--- 160 unchanged lines hidden (view full) ---

422}
423
424template <class Impl>
425void
426FullO3CPU<Impl>::insertThread(unsigned tid)
427{
428 DPRINTF(FullCPU,"[tid:%i] Initializing thread data");
429 // Will change now that the PC and thread state is internal to the CPU
248 // Setup the ROB for whichever stages need it.
249 commit.setROB(&rob);
250
251 lastRunningCycle = curTick;
252
253 contextSwitch = false;
254}
255

--- 160 unchanged lines hidden (view full) ---

416}
417
418template <class Impl>
419void
420FullO3CPU<Impl>::insertThread(unsigned tid)
421{
422 DPRINTF(FullCPU,"[tid:%i] Initializing thread data");
423 // Will change now that the PC and thread state is internal to the CPU
430 // and not in the CPUExecContext.
424 // and not in the ThreadContext.
431#if 0
432#if FULL_SYSTEM
433 ThreadContext *src_tc = system->threadContexts[tid];
434#else
425#if 0
426#if FULL_SYSTEM
427 ThreadContext *src_tc = system->threadContexts[tid];
428#else
435 CPUExecContext *src_tc = thread[tid];
429 ThreadContext *src_tc = thread[tid];
436#endif
437
438 //Bind Int Regs to Rename Map
439 for (int ireg = 0; ireg < TheISA::NumIntRegs; ireg++) {
440 PhysRegIndex phys_reg = freeList.getIntReg();
441
442 renameMap[tid].setEntry(ireg,phys_reg);
443 scoreboard.setReg(phys_reg);

--- 752 unchanged lines hidden --- 		430#endif
431
432 //Bind Int Regs to Rename Map
433 for (int ireg = 0; ireg < TheISA::NumIntRegs; ireg++) {
434 PhysRegIndex phys_reg = freeList.getIntReg();
435
436 renameMap[tid].setEntry(ireg,phys_reg);
437 scoreboard.setReg(phys_reg);

--- 752 unchanged lines hidden ---