cpu.cc (12143:e48005f585f2) cpu.cc (12276:22c220be30c5)
1/*
2 * Copyright (c) 2011-2012, 2014, 2016, 2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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1026{
1027 thread[tid]->unserialize(cp);
1028}
1029
1030template <class Impl>
1031DrainState
1032FullO3CPU<Impl>::drain()
1033{
1/*
2 * Copyright (c) 2011-2012, 2014, 2016, 2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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1026{
1027 thread[tid]->unserialize(cp);
1028}
1029
1030template <class Impl>
1031DrainState
1032FullO3CPU<Impl>::drain()
1033{
1034 // Deschedule any power gating event (if any)
1035 deschedulePowerGatingEvent();
1036
1034 // If the CPU isn't doing anything, then return immediately.
1035 if (switchedOut())
1036 return DrainState::Drained;
1037
1038 DPRINTF(Drain, "Draining...\n");
1039
1040 // We only need to signal a drain to the commit stage as this
1041 // initiates squashing controls the draining. Once the commit

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1181 activateThread(i);
1182 _status = Running;
1183 }
1184 }
1185
1186 assert(!tickEvent.scheduled());
1187 if (_status == Running)
1188 schedule(tickEvent, nextCycle());
1037 // If the CPU isn't doing anything, then return immediately.
1038 if (switchedOut())
1039 return DrainState::Drained;
1040
1041 DPRINTF(Drain, "Draining...\n");
1042
1043 // We only need to signal a drain to the commit stage as this
1044 // initiates squashing controls the draining. Once the commit

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1184 activateThread(i);
1185 _status = Running;
1186 }
1187 }
1188
1189 assert(!tickEvent.scheduled());
1190 if (_status == Running)
1191 schedule(tickEvent, nextCycle());
1192
1193 // Reschedule any power gating event (if any)
1194 schedulePowerGatingEvent();
1189}
1190
1191template <class Impl>
1192void
1193FullO3CPU<Impl>::switchOut()
1194{
1195 DPRINTF(O3CPU, "Switching out\n");
1196 BaseCPU::switchOut();

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1196
1197template <class Impl>
1198void
1199FullO3CPU<Impl>::switchOut()
1200{
1201 DPRINTF(O3CPU, "Switching out\n");
1202 BaseCPU::switchOut();

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