cpu.cc (11627:fe32a5238754) cpu.cc (11793:ef606668d247)
1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 30 unchanged lines hidden (view full) ---

39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 *
42 * Authors: Kevin Lim
43 * Korey Sewell
44 * Rick Strong
45 */
46
1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 30 unchanged lines hidden (view full) ---

39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 *
42 * Authors: Kevin Lim
43 * Korey Sewell
44 * Rick Strong
45 */
46
47#include "cpu/o3/cpu.hh"
48
47#include "arch/kernel_stats.hh"
48#include "config/the_isa.hh"
49#include "arch/kernel_stats.hh"
50#include "config/the_isa.hh"
51#include "cpu/activity.hh"
49#include "cpu/checker/cpu.hh"
50#include "cpu/checker/thread_context.hh"
52#include "cpu/checker/cpu.hh"
53#include "cpu/checker/thread_context.hh"
51#include "cpu/o3/cpu.hh"
52#include "cpu/o3/isa_specific.hh"
53#include "cpu/o3/thread_context.hh"
54#include "cpu/o3/isa_specific.hh"
55#include "cpu/o3/thread_context.hh"
54#include "cpu/activity.hh"
55#include "cpu/quiesce_event.hh"
56#include "cpu/simple_thread.hh"
57#include "cpu/thread_context.hh"
58#include "debug/Activity.hh"
59#include "debug/Drain.hh"
60#include "debug/O3CPU.hh"
61#include "debug/Quiesce.hh"
62#include "enums/MemoryMode.hh"
63#include "sim/core.hh"
64#include "sim/full_system.hh"
65#include "sim/process.hh"
66#include "sim/stat_control.hh"
67#include "sim/system.hh"
68
69#if THE_ISA == ALPHA_ISA
70#include "arch/alpha/osfpal.hh"
71#include "debug/Activity.hh"
56#include "cpu/quiesce_event.hh"
57#include "cpu/simple_thread.hh"
58#include "cpu/thread_context.hh"
59#include "debug/Activity.hh"
60#include "debug/Drain.hh"
61#include "debug/O3CPU.hh"
62#include "debug/Quiesce.hh"
63#include "enums/MemoryMode.hh"
64#include "sim/core.hh"
65#include "sim/full_system.hh"
66#include "sim/process.hh"
67#include "sim/stat_control.hh"
68#include "sim/system.hh"
69
70#if THE_ISA == ALPHA_ISA
71#include "arch/alpha/osfpal.hh"
72#include "debug/Activity.hh"
73
72#endif
73
74struct BaseCPUParams;
75
76using namespace TheISA;
77using namespace std;
78
79BaseO3CPU::BaseO3CPU(BaseCPUParams *params)

--- 1604 unchanged lines hidden --- 		74#endif
75
76struct BaseCPUParams;
77
78using namespace TheISA;
79using namespace std;
80
81BaseO3CPU::BaseO3CPU(BaseCPUParams *params)

--- 1604 unchanged lines hidden ---