cpu.cc (11148:1bc3d93c7eaa) cpu.cc (11150:a8a64cca231b)
1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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387 // Give the thread the TC.
388 this->thread[tid]->tc = tc;
389
390 // Add the TC to the CPU's list of TC's.
391 this->threadContexts.push_back(tc);
392 }
393
394 // FullO3CPU always requires an interrupt controller.
1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 378 unchanged lines hidden (view full) ---

387 // Give the thread the TC.
388 this->thread[tid]->tc = tc;
389
390 // Add the TC to the CPU's list of TC's.
391 this->threadContexts.push_back(tc);
392 }
393
394 // FullO3CPU always requires an interrupt controller.
395 if (!params->switched_out && !interrupts) {
395 if (!params->switched_out && interrupts.empty()) {
396 fatal("FullO3CPU %s has no interrupt controller.\n"
397 "Ensure createInterruptController() is called.\n", name());
398 }
399
400 for (ThreadID tid = 0; tid < this->numThreads; tid++)
401 this->thread[tid]->setFuncExeInst(0);
402}
403

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930 return true;
931}
932
933template <class Impl>
934Fault
935FullO3CPU<Impl>::getInterrupts()
936{
937 // Check if there are any outstanding interrupts
396 fatal("FullO3CPU %s has no interrupt controller.\n"
397 "Ensure createInterruptController() is called.\n", name());
398 }
399
400 for (ThreadID tid = 0; tid < this->numThreads; tid++)
401 this->thread[tid]->setFuncExeInst(0);
402}
403

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930 return true;
931}
932
933template <class Impl>
934Fault
935FullO3CPU<Impl>::getInterrupts()
936{
937 // Check if there are any outstanding interrupts
938 return this->interrupts->getInterrupt(this->threadContexts[0]);
938 return this->interrupts[0]->getInterrupt(this->threadContexts[0]);
939}
940
941template <class Impl>
942void
943FullO3CPU<Impl>::processInterrupts(const Fault &interrupt)
944{
945 // Check for interrupts here. For now can copy the code that
946 // exists within isa_fullsys_traits.hh. Also assume that thread 0
947 // is the one that handles the interrupts.
948 // @todo: Possibly consolidate the interrupt checking code.
949 // @todo: Allow other threads to handle interrupts.
950
951 assert(interrupt != NoFault);
939}
940
941template <class Impl>
942void
943FullO3CPU<Impl>::processInterrupts(const Fault &interrupt)
944{
945 // Check for interrupts here. For now can copy the code that
946 // exists within isa_fullsys_traits.hh. Also assume that thread 0
947 // is the one that handles the interrupts.
948 // @todo: Possibly consolidate the interrupt checking code.
949 // @todo: Allow other threads to handle interrupts.
950
951 assert(interrupt != NoFault);
952 this->interrupts->updateIntrInfo(this->threadContexts[0]);
952 this->interrupts[0]->updateIntrInfo(this->threadContexts[0]);
953
954 DPRINTF(O3CPU, "Interrupt %s being handled\n", interrupt->name());
955 this->trap(interrupt, 0, nullptr);
956}
957
958template <class Impl>
959void
960FullO3CPU<Impl>::trap(const Fault &fault, ThreadID tid,

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954 DPRINTF(O3CPU, "Interrupt %s being handled\n", interrupt->name());
955 this->trap(interrupt, 0, nullptr);
956}
957
958template <class Impl>
959void
960FullO3CPU<Impl>::trap(const Fault &fault, ThreadID tid,

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